CA1083488A - Pulse code modulated digital audio system - Google Patents

Pulse code modulated digital audio system

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Publication number
CA1083488A
CA1083488A CA279,391A CA279391A CA1083488A CA 1083488 A CA1083488 A CA 1083488A CA 279391 A CA279391 A CA 279391A CA 1083488 A CA1083488 A CA 1083488A
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Canada
Prior art keywords
signal
digital
word
signals
audio
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CA279,391A
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French (fr)
Inventor
William E. Whitlock
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LASE INDUSTRIES
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LASE INDUSTRIES
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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/00992Circuits for stereophonic or quadraphonic recording or reproducing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10527Audio or video recording; Data buffering arrangements
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B23/00Record carriers not specific to the method of recording or reproducing; Accessories, e.g. containers, specially adapted for co-operation with the recording or reproducing apparatus ; Intermediate mediums; Apparatus or processes specially adapted for their manufacture
    • G11B23/0007Circuits or methods for reducing noise, for correction of distortion, or for changing density of recorded information
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B27/00Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
    • G11B27/10Indexing; Addressing; Timing or synchronising; Measuring tape travel
    • G11B27/19Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier
    • G11B27/28Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording
    • G11B27/30Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording on the same track as the main recording
    • G11B27/3027Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording on the same track as the main recording used signal is digitally coded
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10527Audio or video recording; Data buffering arrangements
    • G11B2020/10537Audio or video recording
    • G11B2020/10592Audio or video recording specifically adapted for recording or reproducing multichannel signals
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B2220/00Record carriers by type
    • G11B2220/90Tape-like record carriers

Abstract

Applicant: William E. Whitlock Docket No. 2081-101 For: Pulse Code Modulated Digital Audio System BRIEF ABSTRACT

The instantaneous amplitude of an analog audio signal is periodically sampled to be converted into multibit binary digital words representing the sampled amplitude. The bits of successive binary words are reproduced serially with appropriate word and frame synchronising pulses in quarternary coding to pulse code modulate the FM carrier signal used in standard video recording. The recorded signal is demodulated on playback to reproduce successive digital words that are converted in-to discrete analog values which are low pass filtered to reproduce the original audio signal. The reproduced digital values are also stored in successive address locations of a random access memory. Upon detecting data drop-out, such as by monitoring the FM carrier in the reproduced signal, the memory address sequence is reversed to read out the previously entered values backwards, thus approximating the roughly symmetrical waveform envelope of normal high frequency musical signals so as to avoid discernable discontinuity in the audio output. At the same time, timing pulses are delivered to decrease gradually the bandwidth of the voltage controlled low pass filter to smooth the sample outputs from the memory. When actual data is reacquired, timing pulses used to increment the memory address gradually restore the maximum bandwidth of the voltage controlled low pass filter.

1.

Description

; ~L083481~
2 Audio engineers have long recognized that conventional
3 analog recording techniques are rapidly approaching theoretical
4 operational limits, thus leaving little room for furthex significant improvement o~ high quality sound reproduction 6 by these methods. On the other hand, proposals for the use of q digital signal handling techniques offer rewarding alternatives 8 because of inherent theoretical advantages. For one thing, the 9 signal to noise ratio for digital signals remains almost entirely dependent upon the accuracy of the initial converslon 11 and, unlike analog signals, the digital signal is thus largely ¦
12 unaffected by the amount of further handling. Moreover output 13 signal level is not dependent on gain stability of the various 14 circuits and channels, and probIems of frequency dependent phase shift,or other nonlinearities are not encoun~ered during 16 transmission. Digital signals can also be delayed or stored on ,~
17 magnetic media for any length of time without degradation of the 18 recording due to "print-through" from the interaction between 19 adjacent layers of tape or demagnetization. Furthermore, no degradation of signal to noise ratios occurs due to copying or 21 problems of cross-talk between channels, and tape motion 22 problems involving flutter and wow effects can be eliminated 23 with simple digital buffers.
24 But serious problems have arisen in the practical application of digital techniques to audio signals. First of 26 all, poor transmission conditions that would normally only 27 degrade an analog signal can destroy its digital equivalent, 28 and even a small discontinuity can produce very unpleasant audio 29 disturbances. Even a single bit error, if it occurs in the, ___ 31 _ _ 32 ___ ~, .' :' 2.

, . . . . . . . . . . .

most significant digit positions, can produce sudden drastic changes in signal output level of up to one-half full scale that cause very loud and unpleasant clicking noises.
To minimize the effects of data error, much effort has been expended in devising and testing various complex data recording and transmission formats. High performance data processing equipment and techniques currently available are much too expensive even for commercial audio systems, and numerous difficulties had been encountered in achieving the required reliability within the capabilities and price range of existing professional audio tape transport systems. The principal con-straint lies in the high data bit packing densities needed to handle required sampling frequencies in the order of forty kilo- ~
Hertz while providing sufficient quantizing bits to achieve ~;
significantly improved signal to noise ratios at conventional audio tape speeds. The usual expediency of using parallel track recording to achieve greater bit packing densities only intro-duces system complexities associated with tape skew and data synchronization. Multiple audio channels further complicate the situation.
A summary of recent developments and trends in the ~ -mechanization of digital audio systems can be found in the article by J. Dwyer entitled "Digital Techniques in Recording and Broadcasting" published in the June 1975 issue of "Wireless World". The approach suggested therein generally involves the use of a logarithmic type quantizing scale with interleaved multiple track recording of data words containing parity bits for detecting data error in the most significant bits. When data error is detected, the output is simply held at its previous correct level to - , . . . .. . . .
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minimize audible discontinuity. But, this approach has severe limitations if the actual loss of signal or persistent error is extended over more than a few sampling intervals. In that case, the~audible discontinuity would become quite noticeab~e and the loud "click" noise would be quite evident where the signal level changed significantly during the interim. `
Su~Y o- I~E INVENTION
The invention, in one aspect provides, a system for digitally recording and reproducing audio signals comprising:
means for sequentially sampling the instantaneous amplitude of the audio signals periodically at fixed intervals at a rate in excess of twice the maximum desired high frequency response;
analog-to-digital converter means for generating a series of multibit digital words indicative of corresponding sampled amplitude values; coding means for generating recording signals indicative of the multibit digital words generated by said converter means together with periodic synchronizing signals to identify successive multibit digital words; video recorder means for recording and reproducing said recording signals indicative .
of said multibit digital words and said synchronizing pulses for use in generating a substantial duplication of the original audio signal; memory means for storing a selected plurality of the multibit digital words being reproduced in a predetermined order; dropout detector means responsive to the recording signal being reproduced for generating a signal indicative of possible data errors in the digital words being reproduced; and, compensa-tion means responsive to each indication of possible error by said dropout detector means for generating a substitute digital word sequence in accordance with the multibit digital words previously stored in said memory means to be supplied in place of the digital words being reproduced with possible errors in generating said duplication of the original audio signal.

~ 4 .

~L~839~1~l8 BRIEF DESCRIPTION OF THE DRAWINGS
Fig. 1 illustrates in block diagram form the principal circuit components for encoding pulse code modulated audio signals;
Fig. 2 is a wave form diagram illustrating the quarternary pulse coding format generated at the output of the encoder;
Fig. 3 is a block diagram of a video tape system further illustrating the inputs:and outputs therefrom; and Fig. 4 is a further block circuit diagram including the decoder arrangement.
DETAILED DESC~IPTION
In the preferred embodiment illustrated and described herein, the system is designëd for four audio channels of the type employed in modern quadraphonic sound equipment. A full audio bandwidth extending up to 20 kiloHertz can be handled aithough the existing embodiment has a more limited high frequency audlo response to permit handIing of other information channels.
In particular, the existing system was designed for a synchronized visual and audio display for large audiences wherein over 40%
of ltS information handling capability is devoted to transmission -~of auxillary control signals~for operating the visual equipment.
However, as hereinafter described, full audio capabilities can be obtained merely by devoting some of the visual control channels to audio use.
~ Referring now to Fig. 1, which illustrates in block ~
diagram form the principal circuit components for encoding pulse ~ ;
code modulated audio signals in accordance with the preferred `;
form of the invention, the four analog source program signals are applied through different audio input channels designated #1, #2, #3 and #4. Additional analog input signals containing other types of information, such as the visual display control, can be applied through subsidiary control input channels depending - 4a --: .. . . .
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, ,-~ ~083488 1 upon the particular application of the system. In particular, 2 the subsidiary channels might be used for such things as timing 3 and control signals for the existing visual display system, or to 4 enhance, emphasize or blend the transmitted audio sigl~als. Each . analog input is applied through its respective anti-aliasing low 6 pass filter 10 to remove signal. frequencies that exceed one-half r~, of the sampling rate for that channel as dictated by Nyquist 8 sampling theory. To achieve full range audio response, the audio ~ channel filters would eliminate frequencies in excess of twenty kiloHertzj whereas with the more limited audio response of the 11 existing embodiment, the cutoff frequency in the audio channels 12 is about fourteen kiloHertz. As hereinafter explained more 13 fully, the sampling rate in the subsidiary control chanllels is 14 generally lower by a factor of four or more, so that cutoff for 15 the anti-aliasing low pass filter lO in each of these channels is 16 selected at proportionately lower frequencies.
17 The low pass filtered analog signals are applied to the 18 inputs of an analog multiplexer 12 to each be connected in sequence 19 to a sample and hold circuit 14 where the instantaneous analog value of the input is held constant during the time interval 21 required for it to be converted to its digital equival.ent by a 22 high speed analog-to-digital converter 16. For this purpose, a 23 frequency stabilized crystal oscillator 18 delivers timing pulses 24 at a 3.2768 megaHertz rate to a frequency divider timing generator : : 25 20 that coordinates the proper sequence of operati~ns for the 26 analog multiplexer 12, the sample and hold circuit 14, the analog-27 to-digital converter 16, and related circui-ts.
28 In the existing system, the analog multiplexer 12 29 consists of a high speed electronic switcll that responds to ___ 31 ___ 32 ___ .`
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,~ ~0834~38 1 switchiny pulses from the timing generator 20 at the ra-te of 2 approximately 252 kiloHertz to switch its output between 3 different illpUt chanIlels approximately once every four 4 microseconds so that the analog signal value applied to the sample and hold circuit 14 corresponds to the instantaIleous voltage 6 level of~the selected input signal. A complete multiplexing 7 cycle consisting of sixteen switching operations is completed 8 in 63.5 microseconds which, for reasons more Eully explained 9 hereinafter, corresponds to the horizontal sweep rate for a standard television signal. The pulse divider circuits 11 in the timing generator 20 are thus made to supply a switching 12 pulse to the analog multiplexer 12 after thirteen 3.2768 13 megaHertz pulses from the cyrstal oscillator 18 are counted.
14 Pulses at the same frequency applied to the sample antd hold circuit 14 are delayed for t)ne or more pulse counts to 16 allow switching transients in the multiplexer ou-tput to settle.
17 Likewise control pulses from the timing generator 20 applied 18 to the analog to digital converter 16 are further tdelayed 19 to allow the output of the sample and hold circuit 14 sufficient time to stabilize follo~ing full scale variations in the analog 21 input.
22 The binary outputs from the analog-to-digital converter 23 16 are supplied to a parallel to serial converter 22. With 24 this system, the sampled analog values can be quantized using a conventional twelve bit binary count without the need 26 for complex scaling formats. Typically, following the 27 conversion interval needed by the analog-to-tligital converter 28 16, the twel~e bits generated are loaded simultaneously into 29 successive stages of a shift register arrangemen-t to be delivered sequentially to the output of the parallel 31 ___ 32 ___ .

6.
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1 to serial converter 22 in response to shift pulses at the crystal 2 oscillator frequency of 3.2768 megaHertz. The timing generator 3 20 also produces a periodic indexing pulse that follows each 4 prior set of twelve shift pulses and precedes the llext set so as to trigger the parallel loading of the binary bits from the ~ analog-to-digital conver-ter outputs into the appropriate shift 7 register stages of the parallel to serial converter 22. A-t the 8 same time, the indexing pulse actuates a word sync generator 24 to provide a synchronizing pulse with a single bit interval duration of about 0.3 microseconds to precede each twelve bit 11 data word from the parallel to serial converter 22. In addition, .
12 the timing generator 20 delivers periodic pulses to a frame Syllc 13 generator 26 tllat produces an extended duration signal extending 14 for two entire word intervals following each sequence of fourteen binary words. -The synchronizing pulses from the word and frame 16 sync generators 24 and 26 are applied along with the quantizing ~7 data bits read out from the parallel to serial converter 22 to 18 appropriate inputs of a quaternary encoder 28 that generates 19 four distinct output voltage levels.
Referring now to Flg. 2, a wavefoxm diagram illustrates the 21 quarternary pulse coding format generated at the output of the 22 encoder 28. The encoded data appears in repetitive franle 23 groupings consisting of a predetermined number of multibit 24 binary data words separated from one another by word sync pulses 30 that are at a maximum positive voltage for one bit interval.
26 Each frame grouping in the existing format COIISiStS of 27 fourteen consecutive data words with a frame sync pulse 32 28 at either end wherein a minimum amplitude level is 29 nlaintained for two entire word intervals, specifically 7.94 microseconds, to match the conventional horizontal blanking 31 ___ 32 ___ 7.
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1¦ or fly back in-terval in standard video television signals.
C 2 ¦ As illustrated more clearly in the expatlded single word 3 waveform of Fig. ~, each data word CollSists of twelve 4 individual binary bits, each representillg a binary "one" or "zero", in norl-return to zero (NRZ) coding that is switched 6 between intermediate high and low amplitude ]evels. The 7 twelve binary data bits that represent a sampled amplitude 8 value are yenerated iIl a predetermined sequerlce, preferably 9 with the most significant bit (MSB) first.
The sequence of data words within each frame, which 11 is determined by operation of the analog muli:iplexer 12, is preferably arranged so that successive samples of the same 14 audio channel appear at equal or nearly equal intervals at the output. For example, in the existing system where six of the fourteen words in each frame are used to transmit control 7 informatlorl for the visual display, successive samples from the same audio channel are spaced exactly eight word intervals 18 apart so that a sample from each àudio channel appears 19 every 31.75 microseconds. In the existing word sequence 21 format, the first data word following each low level frame 22 Syllc signal 32 contains a timing`arld iderltification code for 23 visual display control. The initial word is followed by 24 successive sample values from each of the four audio channels in the second through firth word positions and again 26 eight words later in the tenth through thirteenth positions. `
Thus sample values for one audio channel appear in the second 28 and tenth wor'd pOSitiOIlS, another in the third and eleventh, `29 the;next iIl the fourth and twelfth, and the last in the fifth and thirteenth word positions, whereas the remaining sixth 31 throuyh ninth and fourteenth word positions are a~ailab].e `

32 for the visual control data.
___ 8.

~L083~38 l In the alternative form pre~erred for achieving full 2 audio response with an increased sampling ra-te, the sample 3 values for each of the four audio channels in a quadraphonic 4 system would appear in the same sequence in the first through .fourth, sixth through ninth, and eleventh through fourteenth 6 word positions, so that samples for each channel appear three q times, instead of only twice, during each frame interval. It 8 is noted that the NRZ data format results in an ef~ective 9 signal frequency of only half of the actual data bit rate to .
millimi~e data packing density. Thus the effective data ll frequency is only 1.64.megaHertz although the data bits are 12~ actually produced at a frequency of 3.27 megabits per second.
13 Referring now to Fig. 3, the four l.evel data signal 1~ output from the quarternary encoder 28 is applied to usual video signal input terminal of a standard video tape system.
16 34 or comparable frequency modulated transmission system. For 17 example, the video system 34 may consist of the commerciall~
18 available "SONY VO-1800 VIDEOC~SSETTE" unit that requires 19 only slight modification as hereinafter explained. However, since much of the video circuitry devoted to handling of the 21 color and audio portions of the standard television signal 22 are not needed, less complex and expensive tape systems could 23 be produced specifically for use in accordance with this 2~ invention, to include only the basic circuit components used in the modulation, recording, reproduction and demodulation 26 of luminance signals. Since the structure and operation of 27 this Ullit and comparable video tape systems are well known 28 to those skilled in the art, the internal componellts and 29 circuit functions need not be described or illustrated in detail 31 ___ 32 ___ .

. . .

:` ~ 33~88 1 ¦ herein, except as it may be necessary to understand certain 2 ¦ modifications.
3 ¦ Using the standard video recorder unit 34, the coded data 4 ¦ signal from the quarternary encoder 28 is fed directly into
5 ¦ the existing automatic frequency controlled modulation loop in
6 ¦ the frequency modulator section 36, thus bypassing t.he initial q ¦ video si.gnal path through the sync separator and color burst 8 ¦ circuitry. After the usual preemphasis to increase high 9 ¦ frequency signal strength above 300 kiloElertz, -the coded 10 ¦ signal is DC amplified under control of a frequency error 11 ¦ signal generated in the control loop so that the minimum . ...
12 I output frequency generated in response to the low level frame 13 ¦ sync signals 32 is established at 3.8 megaHertz and the maximum 1~ ¦ output frequency for the high level word sync signals is set 15 ¦ at 5.4 megaIIertz, thus matching the sync tip and peak white 16 ¦ modulation limits of the standard video signal. The resulting 1~ ¦ FM output is amplitude limited to be applied through the I8 recording amplifiers iIl the record/p-layback section 38 to the 19 two video recording heads 40 and 42, except that the usual 688 kiloHertz trap or notch filter used to eliminate chrominance 21 sidebands from the luminance signal path is bypassed in the 22 interest of enhancing pulse response.
23 The video tape system 34 typically employs a rotary 24 helical scan system wherein two recording heads 40 and 42 remain in contact with the tape (not shown) along skewed 26 diagonal paths in excess of half a revolution of the head drum 27 assembly (not shown). In order to use the existing servo control 28 circuitry for regulating the rotational speed of the head drum 29 relative to the fixed tape speed during recording, an external timing reference signal that corresponds to the vertical 32 sync in video uses is generated at the normal sixty Hertz , 10. ' ' ,..

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~08341 1 frequency by the timing generator 20 to be applied -to the normal 2 vertical sync input terminal of the servo control section 46.
3 These externally generated,timing reference pulses can thus be 4 compared with the head pOsitioll pulses to generate control signals which are indicative o~ their relative time disp].acement and are 6 applied to operate the magnetic brake arrangement that adjusts the drum head speed. Also, during recording, the coded FM signal 8 being recorded is delivered from the frequerlcy modula-tor section 9 36 through the detector demodu1.ation section 48 ~or monitorirlg by setting the nloveable contact of a single pole, two position switch 11 50 in its upper position. ' 12 With recorded video signals, each helical scan exceeds 13 one entire video field so that alternate swit.ching of the signals 14 between the magnetic heads on playback can be coordinated by a ' 15 servo control section 46 to occur during the vertical blanking 16 intervals. However, in this instance, with no vertical sync 17 intervals in the coded signal, head switching must be synchronized 18 to occur durirlg the frame sync pulses 32 to prevent data loss on 19 playback. For this purpose a head switch synchronizer 44 al-ternately enables high speed electronic gates to switch the signal , :, 21 path to the playback section 38 between the two heads 40 and 22 42. ' .' 23 The head switching operation is begun, as with the usual 24 video signal, in response to head pOSitiOIl pulses that are .' generated in the servo control section 46 by sensing the rotary 26 drum position as the respective head 40 or 42 moves onto the ~ ;
27 leading edge o~ the tape to scan eacll he].ical recorcling patll, ~t.
2c~ the same time that the other head reaches the end oE the preceding ,:
29 scan path at the opposite tape edge. The hcad position pulses 33l condition the head switch synchroni~er 44 that then operates 2 during a succeediny ~ra,rne sync pulse 32 which is derived from the 3 ~requency modulated signal in the detector and der,lodulator section 11. ,' ;, . . ' ' , ' '' .: ' ' ' '' , '; . '' '.'',' ,' ''' ~" ": . ~" ", ' ' ,' .' ~, ','' "'' . ' ,~ . . . , ~ . .
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108;14861 1 43, instead of during vertical sync in-tervals present in the 2 normal video signal but absent in this system.
3 On playback, with the moveable contact of the switch 50 set 4 in its down~ard position, the amplified Fl~ signal reproduced from 6 the tape in the reeord/playback seetion 38 is coupled through 6 limiter buffer eireuits 52 to the deteetor demodula-tion seetion ..
7 48.` For this purpose, the video unit vertieal blanking and dropout
8 detection eireuitry usually connected to the limiter buffer
9 eircuit is eliminated, and the eonditioned FM signal being re-produced is delivered direetly for dropout deteetion in the.
11 deeoder arrangement, whieh is described hereinafter in connection 12 with Fig. 4. On the other hand, the demodulated data signal 1~ produeed by the FM detector in the demodulator section 48 .~s 14 amplified and conditioned through a deemphasis circuit, reducing high frequency signal amplitudes, and is then buffered to appear 16 at the normal video output terminal for the system 34. . .~
17 With the exception of the horizontal sync separator also 18 included in the existing circuitry of the unit's detector demod-19 ulator section 48, the remaining system circuitry devoted to vertical sync and eolor control in the existing video 21 tape UIlit 34 is not used and can simply be disconnected 22 or eliminated entirely. Thus the encoded FM signal is recorded 23 and reproduced by the video tape system 3~ simply as if 24 it were a four level monoehromatie video signal. The .
principal advantage in the use of such video reeording 27 teehniques lies in the high speed relative movement of the magnetie head aeross the tape which essentially eliminates 28 the prior difficulties encountered with the extremely high 239 data packing densi.ties that neeessitated multiple traek or 31 ___ . `
32 ___ .; ~
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~ ~Ll383488 1 high performance tape equipment.
2 Referriny now.to Fig. 4, the demodulated data signal .
3 from the video output of the tape system 34 is appropriately 4 filtered, clamped and amplitude stabilized by the usual signal conditionillg circuits 54. The conditioned data signal 6 is then applied to a quarternary dècoder 56 that employs 7 appropriate level sensing circuits to reproduce the output 8 data bits to be applied to a serial to parallel converter 58.
9 The frame and word sync pulses are similarly applied to a frame sync detector 58 and a word Syllc detector 60 which 11 generate phasing signals for periodically resetting the 12 appropriate count in a frequency divider -timiny generator 62 13 that receives 3.2768 megaHertz timing pulses generated by a 14 phase locked oscillator 64 synchronized with the incoming 15 data signal frequency. -16 The timing generator 62 in turn generates a framing 17 pulse coincident with the receipt of each frame SyIlc signal 18 to be applied to the signal conditioning circuits 54 for use 19 in clampi~lg the AC coupled input to a stable DC reference.
20 In particular, the AC coupled incoming data signal can be :.
developed across a capacitor that has its output plate .
22 periodically grounded by the framing pulse to clamp the :.
: 23 frame sync voltage to ground reference, thereby establishiIlg the 24 proper voltage levels for the data and word sync inputs..These levels can then be sensed by appropriate amplitude detectors, such 26 as fixed bias comparators, in the quarternary decoder 56.
Binary da~a bits derived from the qu~rternary decoder 56 are 29 then entered serially into the shift register stages of a serial to parallel converter 66 under con-trol of the timing pulses generated at the oscillator frequency by the ti.ming generator 62.

31 When all tT~elve register stages have been filled with the data ___ .. ' 13. .

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' ` ~153488 1 bits constituting one entire word, all twelve binary bits are ..
2 entered in parallel on the respective bit.inpu-t lines to a random 3 access memory 68 wherein they are stored in a selec-ted word .
position which is determined by the existiny address signal from a meMory address and read/write control unit 70. The memory control 6 UIlit 70 may typically COIISiSt of a dual counter arrangemerl~ with 7 an appropriate address decoder matrix for se-lecting the indicated 8 word address position. In the preferred embodiment~ such a dual 9 counter arrangement employs a master binary counter that has its count continually incremented by each word timing pulse from the 11 timing generator 62. Each counter stage in the master counter is . ..~...
12 coupled in parallel with the respective stage of a reversable 13 memory address counter so that the COUIlt present in the master can 14 be transEerred UpOll command to be entered into the reversable 15 address counter when the data signal is reacquired after a tempor-16 ary dropout.
: 17 To insure more rapid dropout detection than that provided by 18 standard video tape unit 34, a dropout detector 72 uses a 19 high speed double ended comparator for sensing loss of limiting in the FM decoding circuitry. To accomplish this, two Schmitt 21 trigger circuits are biased with appropriate positive and negative 22 voltage settings correspondiny to the selected voltage excursion 23 limits at the reproduced FM signal. Both of these Schmitt triggers 24 . are connected to actuate a one-shot monostable multi-vibrator for one full bit interval. The Schmitt trigger outputs are then 26 applie~ to an error detector that responds immediately when no 27 Schmitt trigger pulse is present to deliver a data error signal 29 to the up/down control gating circuitry for the versable counter in t'ne memory address and read/write control unit 70O The count in the reversable counter is then decremented by the next and each 31 ___ _ . 1~.

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.. . .
.

l succee~ing word count pulse that is received from the timing 2 generator 62 while the data dropout error signal is present, whereas the count in the master counter continues to be incrementec to insure the proper address location when dropout ceases. The data error signal from the error detector 74 likewise blocks the 6 entry of possibly erroneous data words from the serial to parallel r~, converter 66 into random access memory 6~, while data words 8 previously entered are read out from each preceeding memory address 9 position in reverse order as the count value in the reversable counter decreases.
11 The twelve data bit outputs of each memory word position are 12 connected in parallel to a respective digital to analog converter 13 76 that also receives the bit outputs from each of the other word 14 positions associated with a particular audio or control channel.
For example, in the preferred embodiment, a random access memory 16 unit with a total capacity of 3,072 bit posi-tions provides 256 word address positions of twelve bits each. With the existing 18 data format containing two samples for each of the four audio 19 channels during each sixteen word frame interval, the memory provides thirty-two word address positions associated with each 21 audio channel, all of which would be connected in parallel to the 22 respective bit position inputs of selected digital to analog 23 converter 76. If the memory positions are not used for the 2~ control signal channels and frame sync intervals, then the number of word positions for each of the four audio channels can be 26 doubled for a given memory capacity, thus providing a total of 27 sixty-four word position outputs coupled in parallel to each of 28 four digital analog converters 76 with the previously indicated 29 memory capacity.
When no dropout is detected, the paral].el bit outputs from 31 ___ 32 ___ ~0~1348~
the serial to parallel converter 66 can be delivered directly through the random access memory 68 to the appropriate digital to analog converter 76 for each channel. Of course, when a data dropout is detected, this direct path is disconnected so that only the data being read out from the preceding memory address positions in reverse order is received by the appropriate converter 76.
At this point it should be understood that the various gating arrangements and interconnections between the serial to parallel converter 66 and the output digital to analog converter 76, as well as the mechanization of the random access memory 68 and its memory address and read/write control 70, may be varied ~ -in many ways to achieve the desired operational interrelation-ships for achieving such improved system response in handling da -data dropout. Many such alternative arrangements should be apparent to those skilled in the design of digital data proces-sing and logic arrangements. For example, it may be preferable in the absence of data dropout detection to delay the transfer of data outputs from the serial to parallel converter 66 to the appropriate digital to analog converter 76 for a period of one or more word intervals, whereby the data would first be entered into a memory word position and then read out as a subsequent word is being entered to provide a time delay buffering function.
Also, it might in some instances be preferably to use a single digital to analog converter 76 to receive the digital words being delivered at or through the read only memory 68 with an appropriate demultiplexer and sample and hold arrangement for -delivering the successive analog outputs to each output channel.
This output arrangement corresponds to the input system des-cribed in connection with Fig. 1, but the existing arrangement illustrated herein has certain cost advantages in eliminating the need for most costly sample and hold circuitry.

' -` ~0~334f~

Finally, the analog output from each digital to analog converter 76 is applied to a voltage controlled low pass filter 78 that smoothes the signal amplitude transitions from one sample interval to the next. For the audio channels, the voltage controlled low pass filters 78 are operated with a maximum cut-off frequency corresponding to the upper limits of the audio bandwidth capabilities of the system, which with the existing ~` ;
system would be approximately 15 kiloHertz or with the alterna-tive preferred form for maximizing audio response, the cutoff would be 20 kiloHertz. For the other information channels, a ~
different maximum cutoff frequency might be employed depending ~ ;
on the sample rate. The active variable component in the voltage ~
controlled low pass filters 78, typically a conventional analog ~ ;
multiplier circuit receives its control signal from a filter ~ -control circuit 80. Generally a control signal voltage is gen- J . ~ ~ , erated in accordance with the charge developed on an integrating -capacitor that is either charged or discharged by a predetermined amount during each word interval depending on whether or not data dropout is detected. Specifically, in the absence of drop out detection, positive count pulses from the memory address and ~ -read/write control 70 during each word interval deliver a charge to the integrating capacitor, which undergoes slow gradual dis-charge otherwise, sufficient to restore the charge level to its previous maximum thereby maintaining the maximum cutoff frequen-cy in the voltage controlled low pass filter 78. However, upon detecting dropout, the charging pulses are interrupted so the integrating capacitor continues its gradual discharge, thus progressively lowering the cuttoff frequehcy of the voltage con-trolled low pass filter 78. Alternatively, the detection of dropout might be used to trigger a precise pulse discharge during each word interval that matches a selected charging time .... ,, ~ : .~, .

. .' ' .'~:
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. : :. ., . . : ,.- . ...

. , - . : . ,, .. : . ~ . :
. ~ ... , . .

lU834ti~1 1 constant, or if desired, is rnatched to a charging pulse delivered 2 during each word interval in the absence of dropout. The precise 3 time constants in chargillg and discharging in-tervals for the `
4 filter control 80 are of course selected in accordance with the desired audio system capabilities and memory capacity.
6 In operation, the overall effect is -to gradually reduce 7 the high frequency cutoff of the voltage controlled low pass 8 filter 78 during dropout so as to smooth any sudden jump in 9 the analog outpu-t level encountered upon data reacquisition, thereby preventing audible discontinuity. Since the magnitude 11 of the possible amplitude disparity between the transmitted audio 12 signal and that reproduced from the memory 68 during dropout 13 increases as dropout is prolonged, the bandwidth of the voltage 14 controlled low pass filter 78 is reduced accordingly to increase its smoothing capabili-ty. Thus the capability for filtering out 16 audible discontinuities in the output is automatically increased 17 iIl direct proportion to the expected magnitude of the signal 18 discontinuity.
19 In the preferred embodiment, the voltage control signal for the filters 78 is initially discharged upon signal dropout de-21 tection at a relatively rapid rate during the first few word 22 intervals using a relatively fast discharge time constant, but is 23 thereafter decreased at some intermediate rate. On the other 24 hand, after data reacquisition, the recharginy from each word interval pulse is considerably less than the initial rate of 26 discharge, so that the increased low pass filtering action is 27 maintained over an interval exceeding that of the detected drop-28 out, thus protecting against intermittent reac~uisition and 29 dropout. Typically, the time ~aken to restore the maximum control 31 level in the filter control 80 may be around five times more than 32 ___ ___ 18.
,' .

.

108;348~

1 the dropout interval, and the time required to restore the maximum 2 cutoff frequency from its reduced level back to a maximum is 3 typically in -the order of two to three milliseconds.
4 The repetition of the previously reproduced sample :
values during dropout in reverse order thus insures a symmetrical 6 acoustic waveform that imitates the symmetry of most music signals.
7 Accordingly, even a relatively severe dropout extending over 8 several sample intervals produces no audible discordancy, even on 9 reacquisi.tion. In most cases, the effec~ is not even discèrnable to the ordinary listener and is even less noticeable than a 11 similar degradation of an analog transmission.
12 While the analog type voltage controlled filter elements 13 are suitable in most instances, pxoblems might be encoun-tered 14 because of the tendency of such circuits to retain capacitive charge levels that under certain circumstances could inhibit 16 faithful reproduction of the previously stored sample values and , quick recovery of the true audio signal upon data reacquisition.
18 For this reasonj a variety of available digital filtering technique 19 might be employed to simulate the desired analog response or-actually enhance this response by reproducing the stored sample 21 values in modified form to imitate other signal charactertistics.
22 For example, using existing digital filtering techniques with 23 additional computation and storage capacity, the previously 2~ stored digital values might be reproduced during the dropout interval as variations from predetermined base line levels. Such 26 base line levels could be established as a ramp function with a 27 slope corresponding to the average amplitude variation in the 28 immediately preceding series of stored data values whereby 29 lower frequency amplitude variations are continued during dropout.
Thereafter, upon signal reacquisition, the amplitude difference 31 ___ 32 ___ - . . ~ . : .~ . , . : ..
.
,. ,, . ,, .: . , . , .. : . . . :
10~34B8 1 between the last value reproduced Erom the memory and the actual sample value being received could be gradually bridged by 3 subtracting from each successive true sample value a gradually 4 increasing prop~rtion of the instantaneous difference between the filtered output value and the previous sample value. Other specific digital filtering effects such as this may be chosen 7 to suit the particular dropout and recover parameters desired.
8 It should be apparent that this method of resolving and 9 minimizing data dropout discontinuities, while particularly valuable in handling the reproduction of multi-channel audio
11 signals, would also be highly effective in digital transmission
12 systems for other analog signals. For example, the automatic
13 prevention of dropout discontinuity could prevent mechanical
14 or electrical overload of servomechanisms in remote1y controlled positioning systems.
16 Furthermore, it should be understood that certain 17 preferred forms of the system have been described and illustrated 18 herein to explain the nature of the invention, but that various 19 modifications in the components, logic sequence, circuit arrange-~0 ments and other details as may be desired or necessary to 21 accomplish the basic operational functions described and claimed 22 herein should be obvious to those skilled in the digital data 23 handling and transmission fields, without departing from the scope 24 of the invention as set forth in the appended claims. In particular, the various digital logic arrangements described and 26 illustrated herein may be mechanized in any number of ways to make 27 the best use o~ available integrated circuits and other types of 28 logic components, and that various other signal enh~ncement ___ 31 ___ 20.

," .. -, .
.
;

1 circuitry and techniques migh-t be incorporated to improve or 2 modify the basic system described herein, besidcs -those 3 specifically mentioned alternatives mentioned during the c~urse de~ailed d, c.iptiorl as being merely exemplary.

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.
16 . . . .

18 . :

21 . .. ..
2223 . ''.

27 . .

239 .
31 . .

Claims (26)

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:
1. A system for digitally recording and reproducing audio signals comprising:
means for sequentially sampling the instantaneous amplitude of the audio signals periodically at fixed intervals at a rate in excess of twice the maximum desired high frequency response;
analog-to-digital converter means for generating a series of multibit digital words indicative of corresponding sampled amplitude values;
coding means for generating recording signals indicative of the multibit digital words generated by said converter means together with periodic synchronizing signals to identify succes-sive multibit digital words;
video recorder means for recording and reproducing said recording signals indicative of said multibit digital words and said synchronizing pulses for use in generating a substantial duplication of the original audio signal;
memory means for storing a selected plurality of the multibit digital words being reproduced in a predetermined order;
dropout detector means responsive to the recording signal being reproduced for generating a signal indicative of possible data errors in the digital words being reproduced; and, compensation means responsive to each indication of possible error by said dropout detector means for generating a substitute digital word sequence in accordance with the multi-bit digital words previously stored in said memory means to be supplied in place of the digital words being reproduced with possible errors in generating said duplication of the original audio signal.
2. The system of claim 1 further comprising:

a decoding means responsive to the periodic synchoriniz-ing signals reproduced from said video recorder means for repro-ducing the multibit sequence in each digital word;
serial-to- parallel converter means for storing each successive multibit digital word reproduced by said decoding means to be read out at intervals corresponding to the original audio signal sampling sequence; and, digital-to-analog converter means for receiving each multibit digital word to produce an accurate simulation of said original audio signal.
3. The system of claim 2 wherein:
said sampling means includes means for sampling the instantaneous amplitude of audio signals in each of a plurality of audio channels at fixed intervals; and, the decoding means includes timing means for generating the recording signals indicative of the multibit digital words for each different audio channel in a predetermined sequence together with other-multibit digital words.
4. The system of claim 3 further comprising:
serial-to-parallel converter means for storing succes-sive multibit digital words reproduced by said decoding means to be read out at fixed intervals corresponding to the original audio sampling intervals for each audio channel;
a plurality of digital-to-analog converter means each receiving successive multibit digital words to generate a corresponding audio signal for respective ones of said audio channels; and, control means responsive to said periodic synchronizing signals for reading out the multibit digital words indicative of the sampled amplitude values for each audio channel to a respective one of said digital-to-analog converter means at fixed intervals corresponding to the original sequence of periodic sampling intervals for the respective audio channels to accurately reproduce the original audio signal in each channel.
5. The system of claim 4 wherein:
said memory means has a capacity for storing a selected plurality of multibit digital words being reproduced in a pre-determined order for each audio channel; and, said compensation means is responsive to each indication of possible error by said dropout detector means for generating a substitute digital word sequence for each audio channel in accordance with the multibit digital words previously stored in said memory means for each channel to be supplied to the respective ones of said plurality of digital-to-analog converter means in place of digital words being reproduced with possible errors, thereby simulating the sampled audio signal for each channel.
6. The system of claim 1 wherein:
the periodic synchronizing signals generated by said coding means comprise first synchronizing signals generated at fixed intervals, which correspond to the horizontal synch-ronizing signal intervals of a standard video television signal, to separate successive groupings of said multibit digital words.
7. The system of claim 6 wherein:
said periodic synchronizing signals further include second synchronizing signals generated at periodic intervals between said first synchronizing signals to separate successive multibit digital words.
8. The system of claim 1 wherein:
said coding means includes means for generating periodic synchronizing pulses and frequency modulation means responsive to the individual bit values of said multibit binary words and to said synchronizing pulses whereby said recording signal is frequency modulated within the megaHertz range employed in standard video recording; and, said dropout detector means comprises a frequency modulation detector for generating a signal indicative of possible data errors in the digital words being reproduced whenever the amplitude of the frequency modulated signal being reproduced is less than a predetermined minimum level.
9. The system of claim 1 wherein:
said memory means includes address means for entering each successive digital word reproduced in one of a sequential plurality of word address positions; and, said compensation means includes means responsive to the possible data error signal generated by said dropout detec-tor means for interrupting the normal sequence for storing the digital words being reproduced and for reading out from said address positions words previously stored in the reverse sequence of their entry.
10. The system of claim 9 further comprising:
digital-to-analog converter means for receiving either the digital words being entered in the forward sequence or those being read out in reverse sequence from the memory means to generate analog values corresponding to successive sampled amplitude values of the audio signals; and, controlled low pass filter means coupled to receive the analog values generated by said digital-to-analog converter means for providing a selectively variable cut-off frequency that decreases gradually from a maximum audio level in response to said signal indicative of possible error and that is gradu-ally restored to and thereafter maintained at the maximum level during the absence of said error signal.
11. The system of claim 10 wherein:
said coding means includes modulating means for generat-ing said recording signals as a frequency modulated word series of binary bits with synchronizing signals to identify successive groupings of said words;
said video recorder means includes frequency demodulating means for serially detecting the binary value of each data bit and the occurrence of each synchronizing signal;
said memory means includes a serial-to-parallel converter means for registering the serially reproduced data bits of each entire word to be entered in parallel at the selected word, address position; and, said dropout detector means includes a frequency modu-lation detector for generating said signal indicative of possible error whenever the amplitude of the frequency modulated signal being reproduced is less than a predetermined minimum to prevent entry into the memory of the bits registered in said serial-to-parallel converter.
12. The system of claim 11 wherein:
said synchronizing signals include first word synchroni-zing signals generated during a bit interval following each digital word and second frame synchronizing signals generated during one or more discreet word intervals following each successive grouping of digital words,, said binary bit values being indicated by discreet intermediate modulation levels and said word and frame synchronizing signals being indicated by discreet maximum modulation levels corresponding to the modulation frequency limits of a standard video recorder; and, said frequency demodulating means including synchronizing signal detector means responsive to the maximum modulation levels of said synchronizing signals and a phase lock oscillator responsive to the output of said synchronizing signal detector .
to control the registering of said bits in said serial-to-parallel converter and their entry in parallel at selected word positions.
13. The system of claim 12 wherein:
said controlled low pass filter is responsive to the voltage developed by a capacitive charge that is discharged at a fixed rate during each word interval and is incremented towards a maximum charge upon entry of each successive digital word to said memory means, whereby the cut-off frequency of said low pass filter is decreased by said discharge during the presence of said error signal and is gradually restored by successive charge increments upon cessation of said error signal.
14. The system of claim 1 wherein:
said coding means includes a video recorder frequency modulation circuit for generating said synchronizing pulses at respective maximum and minimum amplitudes corresponding to the sync tip and peak white levels of a standard video signal and further includes means for generating said individual bit values at respective intermediate high and low amplitude levels, whereby a standard video recorder carrier signal is modulated at four distinct modulation frequencies indicative of said synchronizing signals and individual bit values.
15. The system of claim 14 wherein:
said recorder means constitutes a helical scan video tape system having a plurality of magnetic recording heads rotated transversely relative to the longitudinal path of a magnetic tape recording medium; and, said synchronizing pulses are generated periodically to correspond with the sweep intervals of a standard video signal.
16. The system of claim 15 wherein:
said video recorder means is responsive to the recorded synchronizing signals for switching the signal path during playback between said recording heads during reproduction of selective ones of said synchronizing pulses generated at the sync tip modulation level of a standard video signal.
17. The system of claim 1 wherein:
said video recorder means has a rotary head tape scan system for recording said recording-signals and is responsive to the synchronizing pulses reproduced from the recorded signals to reproduce said multibit digital words.
18. The system of claim 1 wherein:
said means for sequentially sampling includes sample and hold circuits for periodically registering the instantaneous amplitude of the audio signals; and, said analog-to-digital converter means produces a plurality of binary bit outputs indicative of each instantaneous amplitude registered by said sample and hold circuits and further includes parallel-to-serial converter means for sequentially reproducing each of said binary bit outputs in a predetermined order to be applied to said coding means to generate high and low level recording signals during a predetermined word interval corresponding to the horizontal sweep interval for a standard video signal.
19. The system of claim 18 wherein:
said periodic synchronizing signals include word synchronizing signals generated during at least one bit interval between successive digital words and frame synchronizing signals generated during at least one word interval after each pre-determined sequence of binary words.
20. The system of claim 1 wherein:
said video recorder means is adapted to record and reproduce said multibit digital words and said synchronizing signals in the form of frequency modulated monochromatic video signals wherein each word interval corresponds to the horizontal sweep interval of a standard video signal.
21. The system of claim 1 further comprising:
output means for receiving successive multibit digital words being entered into or read out from said memory means to reproduce a substantial duplication of said audio signals.
22. The system of claim 21 wherein:
said output means includes a digital-to-analog converter for generating analog values corresponding to the sampled values represented by the successive multibit digital words reproduced, and controlled low pass filter means having a selectively variable cut-off frequency that decreases gradually from a maximum level during the detection of possible error and is gradually restored to or maintained at a maximum level when no possible error is detected.
23. The system of claim 1 wherein:
said means for sequentially sampling includes multiplexing means for periodically sampling the instantaneous amplitude of each of a plurality of input audio signals from different audio channels during successive sampling intervals.
24. The system of claim 1 wherein:
said recorder means includes a frequency modulator for modulating a high frequency carrier signal in response to the bits of each digital word and to said synchronizing signals at discreet modulation levels within the range of approximately 3.8 to 5.4 megaHertz.
25. The system of claim 24 wherein:
said modulator produces frequency modulated outputs at approximately 3.8 to 5.4 megaHertz in response to said synchronizing signals and at two discreet intermediate frequencies in response to the digital value of each bit.
26. The system of claim 1 wherein:
said coding means includes a quarternary encoder for generating said synchronizing signals at the sync tip and peak white modulation limits of a standard video signal input to said recorder means and for generating intermediate output levels indicative of the digital value of each bit.
CA279,391A 1976-06-14 1977-05-30 Pulse code modulated digital audio system Expired CA1083488A (en)

Applications Claiming Priority (2)

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US05/696,156 US4030129A (en) 1976-06-14 1976-06-14 Pulse code modulated digital audio system

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AU (1) AU512513B2 (en)
CA (1) CA1083488A (en)
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SE7706844L (en) 1977-12-15
DK262977A (en) 1977-12-15
DE2726842A1 (en) 1977-12-22
US4030129A (en) 1977-06-14
NO772065L (en) 1977-12-15
DE2726842C2 (en) 1989-06-08
FR2355353B1 (en) 1986-03-14
NL7706492A (en) 1977-12-16
AU512513B2 (en) 1980-10-16
SE425130B (en) 1982-08-30
AU2537777A (en) 1978-11-30
JPS5313406A (en) 1978-02-07
GB1573959A (en) 1980-08-28

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