CA1318368C - Correlation pulse generator - Google Patents
Correlation pulse generatorInfo
- Publication number
- CA1318368C CA1318368C CA000587279A CA587279A CA1318368C CA 1318368 C CA1318368 C CA 1318368C CA 000587279 A CA000587279 A CA 000587279A CA 587279 A CA587279 A CA 587279A CA 1318368 C CA1318368 C CA 1318368C
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- Canada
- Prior art keywords
- correlation
- circuit
- output
- spike
- threshold
- Prior art date
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- 238000001228 spectrum Methods 0.000 abstract description 7
- 238000004891 communication Methods 0.000 abstract description 4
- 230000006854 communication Effects 0.000 abstract description 4
- 230000000875 corresponding effect Effects 0.000 description 4
- 238000001514 detection method Methods 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000005070 sampling Methods 0.000 description 2
- 230000001960 triggered effect Effects 0.000 description 2
- 241001163743 Perlodes Species 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
- 230000002596 correlated effect Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/707—Spread spectrum techniques using direct sequence modulation
Abstract
ABSTRACT OF THE DISCLOSURE A correlation pulse generator used in a receiver of a spread spectrum communication system comprises peak hold circuit for holding peak values of positive and negative correlation spikes, threshold setting circuits for generating thresholds based on the peak values, and a comparing circuit for comparing the threshold with a correlation spike to generate a correlation pulse, so that when a level difference exists between positive and negative correlation spike levels of a correlation output, their peaks can be held independently, and thresholds based on the peaks can be generated independently.
Description
~3~36~
FIELD OF THE INVENTION
.
This invention relates to a recei.~er used in a spread spectrum communication system, and more particularly to a correlation pulse generator suitable for use in such a receiver.
BACK GROUND OF TH E I NVENT I ON
_ In a spread spectrum spectrum communication systemr it is essential that it can obtain an appropriate threshold value according to any change in the correlator output so as to never fail to detect a required correlation output~
A prior art system is shown, for example, in Japanese Post-~xamination Publica~ion No. JP-P-60 5639B
entitled ~Receiving Circuit in a Spread Spectrum Communi-cation Sy~tem".
This system is arranged so that peaks of positive and negative correlated spikes of an output of a matched filter are held respectively by a peak hold circuit and are subsequently added. A threshold circuit which generates a threshold value proportional to the resulting peak hold value permits correlation spikes to pass therethrough to perform data demodulation. A circuit arrangement thereof is shown in Figure 3 where reEerence numeral 21 refers to a correlator, 22 to a peak hold circuit, 23 to a computing circuit, 24 to a flip-Elop, 25 to a shift clock generating circuit~ 26 to a shift .;
~ 3 ~
circuit, 27 to a PN code~ 28 to a delay circult, and 29 and 30 to multipliers which behave here as inverters by multiplying -1. That is, a peak hold circuit 31 holds a positive peak whereas a peak hold circuit holds a negative peak. A threshold is obtained from such a peak value via a variable resistor R3 to use the threshold value to detect a positive correlation spike in a comparator 33 and detect a negative correlation spike in a comparator 34.
The prior art circuit arrangement, however, involves the following problems. In order that the peak hold circuit 22 completely holds the peak of a correlation spike, the interior resistance of a diode D1 or D2 and the time constant of a capacitor Cl or C2 must be very small because the correlation spike width is very narrow. That is; the charge time constant must be small.
In contrast, in case of holding the peak value for a time corresponding to about one period of the correlation spike, the time constant defined by a resistor R or R2 and the capacitor Cl or C2 must be - laege in order to prevent a decrease in the hold value which is called "droopn. That is, the discharge time constant must be large.
Referring to the circuit arrangement of Figure 3, in order to establish a threshold which is variable in response to changes in the correlation spike ~(t), the discharge time constant RlCl or R2C2 of the peak hold circuit must be large as apparent from Figure 4.
When considering the follow-up property to ~ ~$3~
change in the peak hold value~ a peak hold circuit having an excellent hold property, i.e~, a large discharge time constant exhibits a poor follow-up property to decrease in the peak value. This is explained below, referring to Figure 5.
When a correlation spike ~(t1 tln this case, data corresponds to l,1,0,01 which exhibits level changes shown in Figure 5 is entered in the peak hold circuit 22, values of the peak hold circuits 31 and 32 are S~
and S~ in b) and c).
If a correlation spike 2 smaller than a negative correlation spike l or a correlation spike 4 larger than a negative correlation spike 3 is obtained, the capacitor Cl or C2 is not changed and continues to discharge.
That is, in the event that the peak value i5 decreased more than the droop caused by the discharge, the peak value cannot be detected. Further, when a threshold Sc and a threshold SD obtained by multiplying the threshold value Sc by -l in the multiplier 30 are as shown in Figure 5a), correlation spike l alone is detected, and correlation spikes 2, 3 and 4 are not detected.
As a result, a demodulated data d(t) is an erroneous data with respect to the inputted data. In Figure 5, a) and e) indicate waveforms of SE and d(t) of Figure 3 respectively.
That is, when the correlation spike ~t) varies as shown in Figure 5, it is difficult to detect correlation spikes as far as fixed positive and negative thresllolds SC and SD are used.
E'urther, as shown in Figure 6, also when the ~3~3~g received signal level is not changed, it i8 sometimes difficult to detect correlation spikes using threshold values Sc and SD obtained through the peak hold circuit 22, because of natures of employed circuits and elements, e.g. a level difference between positive and negative correlation spikes ~in Figure 6, the positive correlation spike is always larger than the negative correlation spike).
OBJECT OF THE INVENTION
It is therefore an object of the invention to provide a peak hold circuit which can reliably follow up changes in the correlator output caused by changes in the received signal level.
A further object of the invention is to provide a circuit capable of reliably de~odulating data by never ailing to produce an appropriate threshold ~ignal and obtain a correlation pulse regardless of any change in the correlator output caused by a change in the received signal level.
A still further object of the invention is to provide a circuit capable of reliably de~odulating data by never failing to establish an appropriate threshold and obtain a correlation pulse even when the correlator j 25 output varies due to changes in the received signal level and a level difference exists between positive and negative correlation spike levals of the correlator output.
SUMMARY OF THE INVENTION
. 30 In order to achieve the aforementioned o~ject, 1~3~g the invention provides a correlation pulse generator including a correlator to correlate a received signal with a reference signal to obtain a correlation spike to produce a correlation pulse based on the correlation spike, said generator comprising:
first peak hold means (2, 4 and S) for holding the peak value of a correlation spike, second peak hold means (8) for holding said peak value held by said first peak hold means:
a threshold setting circuit ~12) responsive to a signal held in said second peak hold means to output a threshold signal; and a comparing circuit for comparing said threshold signal with said correlation spike and generating said correlation pulse.
In order to attain the same object, the invention provides a correlation pulse generator including a correlator to correlate a received signal with a reEerence signal tv obtain a correlation spike to produce a correla-tion pulse based on the correlation spike, said generatorcomprising:
first peak hold means (2, 4 and 6) for holding the peak value of a correlation spike;
second peak hold means (8) for holding said peak value held by said first peak hold means: , a threshold setting circuit ~12) responsive to a signal held in said second peak hold meahs to output a threshold signal;
a comparing circuit for comparing said threshold signal with said correlation spike and geneeating said ;
~ 3 ~ ~ c~
correlation pulse and control means responsive to an output of said comparing circuit to control the peak value holding motion of said secvnd peak hold means.
In order to accomplish the further object, the invention provides a correlation pulse generator includ-ing a correlator to correlate a received signal with a reference signal to obtain a correlation spike to produce a correlat~on pulse based on the correlation spike, said generator comprising:
an A~D converting circuit for converting said correlation spike into a digital pulse;
a first latch circuit for latching an output of said A/D converting circuit7 a first comparing circuit for comparing an output of said first latch circuit with an output of said A/D
converting circuit and controlling the latching motion of said first latch circuit;
a second latch circuit for holding said output of said first latch circuit;
a threshold setting circuit for outputting a threshold signal based on a signal held by said second latch circuit; and a second comparing circuit for comparing said threshold signal with said output oE said A/D converting circuit and generating said correlation pulse.
In order to attain the still Eurther object, the invention provides a correlation pulse generator including a correlator to correlate a received signal with a reference signal to obtain a correlation spike to produce ;
- 13~$3~8 a correlation pulse based on the correlation spike, said generator comprising:
fiest peak hol.d means for ho~ding a Eirst peak value of a positive correlation spike;
a first threshold setting circuit for generating a first threshold based on said first peak value;
a first comparing circuit for comparing said first threshold with said coerelation spike and generating a first correlation pulse;
a second peak hold circuit Eor holding a second peak value of a negative correlation spike;
a second threshold setting circuit for generating a second threshold based on said second peak value, and a second comparing circuit for comparing said - 15 second threshold with said coreelation spike and generating a second correlation pulse.
BRIEF DESCRIPTION OF THi: DRAWINGS
Figure 1 is a block diagram showing a correlation pulse generating circuit used in a spread spectrum receiver according to the invention;
Figure 2 is a timing chart of signals at respective points of the circuit of Figure 1, Figure 3 is a circuit diagram of a prior art correlation pulse generating circuit;
Figure 4 shows voltage wAveforms under a small discharge time constant at ~a~ and a large discharge time constant at (b);
Figure 5 shows a waveforms of signals at respective points of the circuit of Figure 3; and .
~3~$~9~3 Figure 6 shows waveEorms o signals at respective points of the circuit of Figure 3 in presence of a level difference between correlation spikes.
DETAI~BD DESCRIPTION
The invention is described below in detail, referring to a preferred embodiment illustrated in the drawings~ The embodiment should never be construed to be any limitation of the invention, but various modifica-tions and improvements are involved in the invention without departing from the scope thereofl Figure 1 is a block diagram of a correlation pulse generating circuit used in a spread spectrum receiver according to the invention, and Figure 2 is a timing chart of signals at respective points of the circuit oi Figure 1. In Figure lj reference numeral 1 refers to a correlation/PDI (post-detection integration:
- integrating circuit), 2 to an A/D converting circuit, 3 to an inverting circuit, 4~ 5, 8 and 11 to latch circuits, 6, 7, 14 and 15 to comparing circuits, 9 and 10 to gate circuits, 12 and 13 to threshold circuitst and 16 and 17 to peak hold circuits.
The A/D converting circuit 2 converts a correlation spike a into a digital siynal, based on a sampling signal b, and an output c is obtained. Results of sampling the period including the correlation spike a are present in hatched portions of the output c of the A/D converting circuit 2.
The output c of the A/D converting circuit 2 is subsequently divided into paths 1 and 2. 'rhe path 1 is :~ 3 ~
used for detecting positive correlation splke~ whereas the path 2 is used for detecting negative correlation splkes.
The path 2 may be established by the same circuit 5 arrangement as the path l by inverting the polarity of data of N ~it0 of the output c of the A/D converting circuit 2. Therefore, after the A/D converting circuit
FIELD OF THE INVENTION
.
This invention relates to a recei.~er used in a spread spectrum communication system, and more particularly to a correlation pulse generator suitable for use in such a receiver.
BACK GROUND OF TH E I NVENT I ON
_ In a spread spectrum spectrum communication systemr it is essential that it can obtain an appropriate threshold value according to any change in the correlator output so as to never fail to detect a required correlation output~
A prior art system is shown, for example, in Japanese Post-~xamination Publica~ion No. JP-P-60 5639B
entitled ~Receiving Circuit in a Spread Spectrum Communi-cation Sy~tem".
This system is arranged so that peaks of positive and negative correlated spikes of an output of a matched filter are held respectively by a peak hold circuit and are subsequently added. A threshold circuit which generates a threshold value proportional to the resulting peak hold value permits correlation spikes to pass therethrough to perform data demodulation. A circuit arrangement thereof is shown in Figure 3 where reEerence numeral 21 refers to a correlator, 22 to a peak hold circuit, 23 to a computing circuit, 24 to a flip-Elop, 25 to a shift clock generating circuit~ 26 to a shift .;
~ 3 ~
circuit, 27 to a PN code~ 28 to a delay circult, and 29 and 30 to multipliers which behave here as inverters by multiplying -1. That is, a peak hold circuit 31 holds a positive peak whereas a peak hold circuit holds a negative peak. A threshold is obtained from such a peak value via a variable resistor R3 to use the threshold value to detect a positive correlation spike in a comparator 33 and detect a negative correlation spike in a comparator 34.
The prior art circuit arrangement, however, involves the following problems. In order that the peak hold circuit 22 completely holds the peak of a correlation spike, the interior resistance of a diode D1 or D2 and the time constant of a capacitor Cl or C2 must be very small because the correlation spike width is very narrow. That is; the charge time constant must be small.
In contrast, in case of holding the peak value for a time corresponding to about one period of the correlation spike, the time constant defined by a resistor R or R2 and the capacitor Cl or C2 must be - laege in order to prevent a decrease in the hold value which is called "droopn. That is, the discharge time constant must be large.
Referring to the circuit arrangement of Figure 3, in order to establish a threshold which is variable in response to changes in the correlation spike ~(t), the discharge time constant RlCl or R2C2 of the peak hold circuit must be large as apparent from Figure 4.
When considering the follow-up property to ~ ~$3~
change in the peak hold value~ a peak hold circuit having an excellent hold property, i.e~, a large discharge time constant exhibits a poor follow-up property to decrease in the peak value. This is explained below, referring to Figure 5.
When a correlation spike ~(t1 tln this case, data corresponds to l,1,0,01 which exhibits level changes shown in Figure 5 is entered in the peak hold circuit 22, values of the peak hold circuits 31 and 32 are S~
and S~ in b) and c).
If a correlation spike 2 smaller than a negative correlation spike l or a correlation spike 4 larger than a negative correlation spike 3 is obtained, the capacitor Cl or C2 is not changed and continues to discharge.
That is, in the event that the peak value i5 decreased more than the droop caused by the discharge, the peak value cannot be detected. Further, when a threshold Sc and a threshold SD obtained by multiplying the threshold value Sc by -l in the multiplier 30 are as shown in Figure 5a), correlation spike l alone is detected, and correlation spikes 2, 3 and 4 are not detected.
As a result, a demodulated data d(t) is an erroneous data with respect to the inputted data. In Figure 5, a) and e) indicate waveforms of SE and d(t) of Figure 3 respectively.
That is, when the correlation spike ~t) varies as shown in Figure 5, it is difficult to detect correlation spikes as far as fixed positive and negative thresllolds SC and SD are used.
E'urther, as shown in Figure 6, also when the ~3~3~g received signal level is not changed, it i8 sometimes difficult to detect correlation spikes using threshold values Sc and SD obtained through the peak hold circuit 22, because of natures of employed circuits and elements, e.g. a level difference between positive and negative correlation spikes ~in Figure 6, the positive correlation spike is always larger than the negative correlation spike).
OBJECT OF THE INVENTION
It is therefore an object of the invention to provide a peak hold circuit which can reliably follow up changes in the correlator output caused by changes in the received signal level.
A further object of the invention is to provide a circuit capable of reliably de~odulating data by never ailing to produce an appropriate threshold ~ignal and obtain a correlation pulse regardless of any change in the correlator output caused by a change in the received signal level.
A still further object of the invention is to provide a circuit capable of reliably de~odulating data by never failing to establish an appropriate threshold and obtain a correlation pulse even when the correlator j 25 output varies due to changes in the received signal level and a level difference exists between positive and negative correlation spike levals of the correlator output.
SUMMARY OF THE INVENTION
. 30 In order to achieve the aforementioned o~ject, 1~3~g the invention provides a correlation pulse generator including a correlator to correlate a received signal with a reference signal to obtain a correlation spike to produce a correlation pulse based on the correlation spike, said generator comprising:
first peak hold means (2, 4 and S) for holding the peak value of a correlation spike, second peak hold means (8) for holding said peak value held by said first peak hold means:
a threshold setting circuit ~12) responsive to a signal held in said second peak hold means to output a threshold signal; and a comparing circuit for comparing said threshold signal with said correlation spike and generating said correlation pulse.
In order to attain the same object, the invention provides a correlation pulse generator including a correlator to correlate a received signal with a reEerence signal tv obtain a correlation spike to produce a correla-tion pulse based on the correlation spike, said generatorcomprising:
first peak hold means (2, 4 and 6) for holding the peak value of a correlation spike;
second peak hold means (8) for holding said peak value held by said first peak hold means: , a threshold setting circuit ~12) responsive to a signal held in said second peak hold meahs to output a threshold signal;
a comparing circuit for comparing said threshold signal with said correlation spike and geneeating said ;
~ 3 ~ ~ c~
correlation pulse and control means responsive to an output of said comparing circuit to control the peak value holding motion of said secvnd peak hold means.
In order to accomplish the further object, the invention provides a correlation pulse generator includ-ing a correlator to correlate a received signal with a reference signal to obtain a correlation spike to produce a correlat~on pulse based on the correlation spike, said generator comprising:
an A~D converting circuit for converting said correlation spike into a digital pulse;
a first latch circuit for latching an output of said A/D converting circuit7 a first comparing circuit for comparing an output of said first latch circuit with an output of said A/D
converting circuit and controlling the latching motion of said first latch circuit;
a second latch circuit for holding said output of said first latch circuit;
a threshold setting circuit for outputting a threshold signal based on a signal held by said second latch circuit; and a second comparing circuit for comparing said threshold signal with said output oE said A/D converting circuit and generating said correlation pulse.
In order to attain the still Eurther object, the invention provides a correlation pulse generator including a correlator to correlate a received signal with a reference signal to obtain a correlation spike to produce ;
- 13~$3~8 a correlation pulse based on the correlation spike, said generator comprising:
fiest peak hol.d means for ho~ding a Eirst peak value of a positive correlation spike;
a first threshold setting circuit for generating a first threshold based on said first peak value;
a first comparing circuit for comparing said first threshold with said coerelation spike and generating a first correlation pulse;
a second peak hold circuit Eor holding a second peak value of a negative correlation spike;
a second threshold setting circuit for generating a second threshold based on said second peak value, and a second comparing circuit for comparing said - 15 second threshold with said coreelation spike and generating a second correlation pulse.
BRIEF DESCRIPTION OF THi: DRAWINGS
Figure 1 is a block diagram showing a correlation pulse generating circuit used in a spread spectrum receiver according to the invention;
Figure 2 is a timing chart of signals at respective points of the circuit of Figure 1, Figure 3 is a circuit diagram of a prior art correlation pulse generating circuit;
Figure 4 shows voltage wAveforms under a small discharge time constant at ~a~ and a large discharge time constant at (b);
Figure 5 shows a waveforms of signals at respective points of the circuit of Figure 3; and .
~3~$~9~3 Figure 6 shows waveEorms o signals at respective points of the circuit of Figure 3 in presence of a level difference between correlation spikes.
DETAI~BD DESCRIPTION
The invention is described below in detail, referring to a preferred embodiment illustrated in the drawings~ The embodiment should never be construed to be any limitation of the invention, but various modifica-tions and improvements are involved in the invention without departing from the scope thereofl Figure 1 is a block diagram of a correlation pulse generating circuit used in a spread spectrum receiver according to the invention, and Figure 2 is a timing chart of signals at respective points of the circuit oi Figure 1. In Figure lj reference numeral 1 refers to a correlation/PDI (post-detection integration:
- integrating circuit), 2 to an A/D converting circuit, 3 to an inverting circuit, 4~ 5, 8 and 11 to latch circuits, 6, 7, 14 and 15 to comparing circuits, 9 and 10 to gate circuits, 12 and 13 to threshold circuitst and 16 and 17 to peak hold circuits.
The A/D converting circuit 2 converts a correlation spike a into a digital siynal, based on a sampling signal b, and an output c is obtained. Results of sampling the period including the correlation spike a are present in hatched portions of the output c of the A/D converting circuit 2.
The output c of the A/D converting circuit 2 is subsequently divided into paths 1 and 2. 'rhe path 1 is :~ 3 ~
used for detecting positive correlation splke~ whereas the path 2 is used for detecting negative correlation splkes.
The path 2 may be established by the same circuit 5 arrangement as the path l by inverting the polarity of data of N ~it0 of the output c of the A/D converting circuit 2. Therefore, after the A/D converting circuit
2, the path 2 is entered in the inverting circuit 3.
Since the circuit arrangements of the inverting circuit
Since the circuit arrangements of the inverting circuit
3 et seq. of the path 2 are identical to those of the path 1, operations of the path 1 alone are explained.
The output c of the A/D converting circuit 2 is entered in the latch circuit 4 and the comparing circuit 6. The comparing circuit 6 compares the output c of the A/D converting circuit 2 with data stored in the latch circuit 4. When it is judged that the output c of the A/D converting circuit 2 is larger, a pulse d is obtained.
The latch circuit 4 is triggered by the pulse d to store the data o the output c of the A/D convecting circuit 2, so that the data f of the latch circuit 4 is renewed.
By comparing the output c of the A/D converting circuit 2 with th data ~ of the latch circuit 4 sequen-tially and renewing the data f stored in ~he latch circuit 4, the peak hold circuit 16 for obtaining the maximum value oE the output c of the A/D converting circuit 2 is arranged.
The latch circuit 4 clears its stwk f in response to a clear signal e every perlod of the correla-tion spike, and holds a new peak of the last period of the correlation spike. The pulse period of the clear :
~ 3 ~
signal e is equal to the period of the correlation spike. That is, the peak hold circuit having this circuit arrangement can reliably hold the peak value of one period oE the correlation spike.
After this, before clearing the latch circuit 4 by the clear signal e, the maximum value of the output c of the A~D converting circuit 2 corresponding to one period of the correlation spike stored in the latch circuit 4 is stored in the latch circuit 8 triggered by a signal h. Here, when a positive correlation pulse i enters in the gate circuit 9 before the pulse of the .
clear signal e enters, the gate circuit 9 permits an enable signal ~ to pass therethrough and causes the signal h to enter in the latch circuit 8.
- 15 When the positive correlation pulse i does not exist, the gate is shut, the signal h is not outputted, and the latch circuit 8 does not receive any trigger pulse. Therefore, no change occurs in an output i of the latch circuit 8.
~- 20 The latch circuit 8 holds the peak value of one period of the correlation spike, and in presence of a positive correlation pulse, it judges whether the peak value data of one pe~iod of the correlation spike here-tofore stored therein should be renewed or not in a subsequent period of the correlation spike.
By employing this arrangement, the circuit can reliably hold the peak value of a correlation spike within one period of the correlation spike a, can reliably follow up changes in the peak value, and can prevent erroneous operations upon changes in the :
polarity of the correlation spike.
The output data of the latch clrcuit 8 is entered in the threshold circuit 12 which perfor~s computation of the output data 1 of the latch circuit 8 and a control signal k indicative oE the multiplication factor, and generates a threshold Q. The threshold Q is a digital signal of N bits, and the control signal k may be generated in a CPU, etc., for example, The threshold Q obtained in the threshold circuit 12 is entered in the comparing circuit 14. The comparing circuit 14 compares the output c oE the AfD converting circuit ~ with the threshold Q, and when the output c of the A/D converting circuit 2 is larger than the threshold Q, an output i is obtained, Thus the correlation pulse i corresponding to the correlation spike is obtained.
More specifically, by storing in the latch circuit 8 the peak value of the output c of the A/D
converting circuit 2 corresponding to one period of the correlation spike obtained by the peak hold circuit 16, ~0 the threshold Q of the subsequent one period is established. Even if there i8 not output c of the A/D
converting circuit 2 above the threshold Q of this one period and no correlation pulse i is obtained, the data i of the latch circuit 8 is maintained and not lost, so j 25 that the threshold Q is set at the same value also in the subsequent one period.
Therefore, as shown in Figure 2, although the data f stored in the latch circuit 4 of the peak hold circuit 16 in the period including a negative correlation - 30 spike exhibits a noise level, no erroneous detection of .; .
3 ~ ~
the correlation pulse i occurs in the comparing circuit 14 as far as the latch circuit 8 holds the peak value oE
the preceding period.
Further, the threshold Q for detection of a correlation spike in the subsequent period to the negative correlation spike may be establ.ished by the output i of the latch circuit 8, and it is possible to detect correlation spikes alone.
As described above, by dividing the circuit after the A/D converting circuit 2 into path 1 and path 2, two paths efect their peak holding operations indepen-dently and establish thresholds Q independently, so that no detection error occurs even upon changes in the correlation spike a or in presence of a level di~ference between positive and negative poles of the correlation .spike a~
Although the illustrated peak hold circuit has an arrangement based on a diqital signal processing, the invention can be used for an analog signal processing arrangement by replacing the latch circuit by a hold circuit.
As described above, according to the invention, also upon changes in the correlation output caused by changes in the input level, or in presence of a level difference between positive and negative spike levels of the correlator output, p~ecise peak holding operation and precise data demodulation are ensured.
The output c of the A/D converting circuit 2 is entered in the latch circuit 4 and the comparing circuit 6. The comparing circuit 6 compares the output c of the A/D converting circuit 2 with data stored in the latch circuit 4. When it is judged that the output c of the A/D converting circuit 2 is larger, a pulse d is obtained.
The latch circuit 4 is triggered by the pulse d to store the data o the output c of the A/D convecting circuit 2, so that the data f of the latch circuit 4 is renewed.
By comparing the output c of the A/D converting circuit 2 with th data ~ of the latch circuit 4 sequen-tially and renewing the data f stored in ~he latch circuit 4, the peak hold circuit 16 for obtaining the maximum value oE the output c of the A/D converting circuit 2 is arranged.
The latch circuit 4 clears its stwk f in response to a clear signal e every perlod of the correla-tion spike, and holds a new peak of the last period of the correlation spike. The pulse period of the clear :
~ 3 ~
signal e is equal to the period of the correlation spike. That is, the peak hold circuit having this circuit arrangement can reliably hold the peak value of one period oE the correlation spike.
After this, before clearing the latch circuit 4 by the clear signal e, the maximum value of the output c of the A~D converting circuit 2 corresponding to one period of the correlation spike stored in the latch circuit 4 is stored in the latch circuit 8 triggered by a signal h. Here, when a positive correlation pulse i enters in the gate circuit 9 before the pulse of the .
clear signal e enters, the gate circuit 9 permits an enable signal ~ to pass therethrough and causes the signal h to enter in the latch circuit 8.
- 15 When the positive correlation pulse i does not exist, the gate is shut, the signal h is not outputted, and the latch circuit 8 does not receive any trigger pulse. Therefore, no change occurs in an output i of the latch circuit 8.
~- 20 The latch circuit 8 holds the peak value of one period of the correlation spike, and in presence of a positive correlation pulse, it judges whether the peak value data of one pe~iod of the correlation spike here-tofore stored therein should be renewed or not in a subsequent period of the correlation spike.
By employing this arrangement, the circuit can reliably hold the peak value of a correlation spike within one period of the correlation spike a, can reliably follow up changes in the peak value, and can prevent erroneous operations upon changes in the :
polarity of the correlation spike.
The output data of the latch clrcuit 8 is entered in the threshold circuit 12 which perfor~s computation of the output data 1 of the latch circuit 8 and a control signal k indicative oE the multiplication factor, and generates a threshold Q. The threshold Q is a digital signal of N bits, and the control signal k may be generated in a CPU, etc., for example, The threshold Q obtained in the threshold circuit 12 is entered in the comparing circuit 14. The comparing circuit 14 compares the output c oE the AfD converting circuit ~ with the threshold Q, and when the output c of the A/D converting circuit 2 is larger than the threshold Q, an output i is obtained, Thus the correlation pulse i corresponding to the correlation spike is obtained.
More specifically, by storing in the latch circuit 8 the peak value of the output c of the A/D
converting circuit 2 corresponding to one period of the correlation spike obtained by the peak hold circuit 16, ~0 the threshold Q of the subsequent one period is established. Even if there i8 not output c of the A/D
converting circuit 2 above the threshold Q of this one period and no correlation pulse i is obtained, the data i of the latch circuit 8 is maintained and not lost, so j 25 that the threshold Q is set at the same value also in the subsequent one period.
Therefore, as shown in Figure 2, although the data f stored in the latch circuit 4 of the peak hold circuit 16 in the period including a negative correlation - 30 spike exhibits a noise level, no erroneous detection of .; .
3 ~ ~
the correlation pulse i occurs in the comparing circuit 14 as far as the latch circuit 8 holds the peak value oE
the preceding period.
Further, the threshold Q for detection of a correlation spike in the subsequent period to the negative correlation spike may be establ.ished by the output i of the latch circuit 8, and it is possible to detect correlation spikes alone.
As described above, by dividing the circuit after the A/D converting circuit 2 into path 1 and path 2, two paths efect their peak holding operations indepen-dently and establish thresholds Q independently, so that no detection error occurs even upon changes in the correlation spike a or in presence of a level di~ference between positive and negative poles of the correlation .spike a~
Although the illustrated peak hold circuit has an arrangement based on a diqital signal processing, the invention can be used for an analog signal processing arrangement by replacing the latch circuit by a hold circuit.
As described above, according to the invention, also upon changes in the correlation output caused by changes in the input level, or in presence of a level difference between positive and negative spike levels of the correlator output, p~ecise peak holding operation and precise data demodulation are ensured.
Claims (13)
1. A correlation pulse generator including a correlator to correlate a received signal with a reference signal to obtain a correlation spike to produce a correla-tion pulse based on the correlation spike, said generator comprising:
first peak hold means for holding the peak value of a correlation spike;
second peak hold means for holding said peak value held by said first peak hold means;
a threshold setting circuit responsive to a signal held in said second peak hold means to output a threshold signal; and a comparing circuit for comparing said threshold signal with said correlation spike and generating said correlation pulse.
first peak hold means for holding the peak value of a correlation spike;
second peak hold means for holding said peak value held by said first peak hold means;
a threshold setting circuit responsive to a signal held in said second peak hold means to output a threshold signal; and a comparing circuit for comparing said threshold signal with said correlation spike and generating said correlation pulse.
2. The correlation pulse generator according to claim 1 wherein said first peak hold means is configured so that said peak value is cleared at a desired timing by a clear signal.
3. A correlation pulse generator according to claim 1 wherein said threshold setting circuit generates an output signal of a value corresponding to an output value of said second peak hold means multiplied by a multiplication factor.
4. A correlation pulse generator including a correlator to correlate a received signal with a reference signal to obtain a correlation spike to produce a correla-tion pulse based on the correlation spike/ said generator comprising:
first peak hold means for holding the peak value of a correlation spike;
second peak hold means for holding said peak value held by said first peak hold means;
threshold setting circuit responsive to a signal held in said second peak hold means to output a threshold signal;
a comparing circuit for comparing said threshold signal with said correlation spike and generating said correlation pulse; and control means responsive to an output of said comparing circuit to control the peak value holding motion of said second peak hold means.
first peak hold means for holding the peak value of a correlation spike;
second peak hold means for holding said peak value held by said first peak hold means;
threshold setting circuit responsive to a signal held in said second peak hold means to output a threshold signal;
a comparing circuit for comparing said threshold signal with said correlation spike and generating said correlation pulse; and control means responsive to an output of said comparing circuit to control the peak value holding motion of said second peak hold means.
5. The correlation pulse generator according to claim 4 wherein said control means includes a gate circuit which controls the passage of a trigger signal causing said second peak hold means to hold or not said peak value.
6. A correlation pulse generator including a corre-lator to correlate a received signal with a reference signal to obtain a correlation spike to produce a correlation pulse based on the correlation spike, said generator comprising:
an A/D converting circuit for converting said correlation spike into a digital signal;
a first latch circuit for latching an output of said A/D converting circuit;
a first comparing circuit for comparing an output of said first latch circuit with an output of said A/D
converting circuit and controlling the latching motion of said first latch circuit;
a second latch circuit for holding said output of said first latch circuit;
a threshold setting circuit for outputting a threshold signal based on a signal held by said second latch circuit; and a second comparing circuit for comparing said threshold signal with said output of said A/D converting circuit and generating a correlation pulse.
an A/D converting circuit for converting said correlation spike into a digital signal;
a first latch circuit for latching an output of said A/D converting circuit;
a first comparing circuit for comparing an output of said first latch circuit with an output of said A/D
converting circuit and controlling the latching motion of said first latch circuit;
a second latch circuit for holding said output of said first latch circuit;
a threshold setting circuit for outputting a threshold signal based on a signal held by said second latch circuit; and a second comparing circuit for comparing said threshold signal with said output of said A/D converting circuit and generating a correlation pulse.
7. The correlation pulse generator according to claim 6 wherein said first latch circuit is configured so that the content stored therein is cleared at a desired timing.
8. A correlation pulse generator including a corre-lator to correlate a received signal with a reference signal to obtain a correlation spike to produce a correla-tion pulse based on the correlation spike, said generator comprising:
first peak hold means for holding a first peak value of a positive correlation spike;
a first threshold setting circuit for generating a first threshold based on said first peak value;
a first comparing circuit for comparing said first threshold with said correlation spike and generating a first correlation pulse;
a second peak hold circuit for holding a second peak value of a negative correlation spike;
a second threshold setting circuit for generating a second threshold based on said second peak value; and a second comparing circuit for comparing said second threshold with said correlation spike and generating a second correlation pulse,
first peak hold means for holding a first peak value of a positive correlation spike;
a first threshold setting circuit for generating a first threshold based on said first peak value;
a first comparing circuit for comparing said first threshold with said correlation spike and generating a first correlation pulse;
a second peak hold circuit for holding a second peak value of a negative correlation spike;
a second threshold setting circuit for generating a second threshold based on said second peak value; and a second comparing circuit for comparing said second threshold with said correlation spike and generating a second correlation pulse,
9. The correlation pulse generator according to claim 8 wherein said first peak hold means includes a first latch circuit for latching said correlation spike and a second latching circuit for latching an output of said first latch circuit, and wherein said second peak hold means includes a third latch circuit for latching said correlation spike and a fourth latch circuit for latching an output of said third latching circuit.
10. The correlation pulse generator according to claim 8 wherein said first and second peak hold means are each configured so that said peak value held therein is cleared at a desired timing.
11. The correlation pulse generator according to claim 8 wherein said first and second threshold setting circuits produce values corresponding to output values of said first and second hold circuits multiplied by a multiplication factor.
12. The correlation pulse generator according to claim 9 wherein said second latch circuit is controlled by an output of said first comparing circuit to hold or not said output of said first latch circuit, and wherein said fourth latch circuit is controlled by an output of said second comparing circuit to hold or not said output of said third latch circuit.
13. The correlation pulse generator according to claim 11 wherein said multiplication factor is controlled by a CPU.
Applications Claiming Priority (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63007143A JPH0683179B2 (en) | 1988-01-14 | 1988-01-14 | Spread spectrum receiver |
| JP007141/1988 | 1988-01-14 | ||
| JP63007141A JPH0748704B2 (en) | 1988-01-14 | 1988-01-14 | Spread spectrum receiver |
| JP007143/1988 | 1988-01-14 | ||
| JP63007142A JPH0748705B2 (en) | 1988-01-14 | 1988-01-14 | Spread spectrum receiver |
| JP007142/1988 | 1988-01-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1318368C true CA1318368C (en) | 1993-05-25 |
Family
ID=27277489
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000587279A Expired - Fee Related CA1318368C (en) | 1988-01-14 | 1988-12-29 | Correlation pulse generator |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US4965759A (en) |
| CA (1) | CA1318368C (en) |
| DE (1) | DE3900921C2 (en) |
| FR (1) | FR2626120B1 (en) |
| GB (1) | GB2214034B (en) |
| NL (1) | NL8900080A (en) |
Families Citing this family (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5499265A (en) * | 1989-08-07 | 1996-03-12 | Omnipoint Data Company, Incorporated | Spread spectrum correlator |
| EP0540664A4 (en) * | 1990-07-23 | 1993-06-09 | Omnipoint Corporation | Sawc phase-detection method and apparatus |
| GB9019487D0 (en) * | 1990-09-06 | 1990-10-24 | Ncr Co | Carrier detection for a wireless local area network |
| DE59103662D1 (en) * | 1990-09-21 | 1995-01-12 | Siemens Ag | Method for recognizing periodically occurring digital signals in the reception path of a digital echo canceller. |
| WO1992007434A1 (en) * | 1990-10-23 | 1992-04-30 | Omnipoint Corporation | Method and apparatus for establishing spread spectrum communications |
| IT1244906B (en) * | 1991-01-23 | 1994-09-13 | Vitroselenia Spa | EXTENDED BAND MOBILE RADIO BRIDGE FOR MULTIPLE REFLECTION ENVIRONMENTS AND HIGH CAPACITY. |
| US5402413A (en) * | 1991-04-08 | 1995-03-28 | Omnipoint Corporation | Three-cell wireless communication system |
| AU2140092A (en) * | 1991-05-13 | 1992-12-30 | Omnipoint Corporation | Dual mode transmitter and receiver |
| US5285469A (en) * | 1991-06-03 | 1994-02-08 | Omnipoint Data Corporation | Spread spectrum wireless telephone system |
| US5390206A (en) * | 1991-10-01 | 1995-02-14 | American Standard Inc. | Wireless communication system for air distribution system |
| EP0617864B1 (en) * | 1991-12-16 | 2002-02-27 | XIRCOM Wireless, Inc. | Spread-spectrum data publishing system |
| US5224648A (en) * | 1992-03-27 | 1993-07-06 | American Standard Inc. | Two-way wireless HVAC system and thermostat |
| US5465405A (en) * | 1992-07-30 | 1995-11-07 | Raytheon Company | Apparatus and method for detecting signals |
| US5289498A (en) * | 1992-09-09 | 1994-02-22 | Echelon Corporation | Adaptive data recovery for spread spectrum systems |
| US5355389A (en) * | 1993-01-13 | 1994-10-11 | Omnipoint Corporation | Reciprocal mode saw correlator method and apparatus |
| FR2710214B1 (en) * | 1993-09-15 | 1995-10-20 | Alcatel Mobile Comm France | Threshold detector for a digital radio transmission system, devices comprising such a threshold detector and corresponding use. |
| US5404320A (en) * | 1993-09-29 | 1995-04-04 | Loral Infrared & Imaging Systems, Inc. | Autocorrelation processing method and apparatus |
| US5784403A (en) * | 1995-02-03 | 1998-07-21 | Omnipoint Corporation | Spread spectrum correlation using saw device |
| US5742595A (en) | 1995-06-02 | 1998-04-21 | Dsc Communications Corporation | Processing CDMA signals |
| US5745484A (en) * | 1995-06-05 | 1998-04-28 | Omnipoint Corporation | Efficient communication system using time division multiplexing and timing adjustment control |
| US6356607B1 (en) | 1995-06-05 | 2002-03-12 | Omnipoint Corporation | Preamble code structure and detection method and apparatus |
| US5629639A (en) * | 1995-06-07 | 1997-05-13 | Omnipoint Corporation | Correlation peak detector |
| US6141373A (en) * | 1996-11-15 | 2000-10-31 | Omnipoint Corporation | Preamble code structure and detection method and apparatus |
| US6744806B1 (en) | 2000-09-13 | 2004-06-01 | Ut-Battelle, L.L.C. | Fast-synchronizing high-fidelity spread-spectrum receiver |
| US7577188B1 (en) * | 2001-09-13 | 2009-08-18 | Cisco Technology, Inc. | Physical layer and MAC enhancements using complex sequences on a wireless channel |
| US7292656B2 (en) * | 2002-04-22 | 2007-11-06 | Cognio, Inc. | Signal pulse detection scheme for use in real-time spectrum analysis |
| EP2016694B1 (en) * | 2006-05-09 | 2019-03-20 | Cognio, Inc. | System and method for identifying wireless devices using pulse fingerprinting and sequence analysis |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4686655A (en) * | 1970-12-28 | 1987-08-11 | Hyatt Gilbert P | Filtering system for processing signature signals |
| US4494213A (en) * | 1982-06-11 | 1985-01-15 | The Babcock & Wilcox Company | Dedicated correlator |
| JPS59113500A (en) * | 1982-12-20 | 1984-06-30 | 電子計算機基本技術研究組合 | Correlative function calculator |
| JPS605639A (en) * | 1983-06-23 | 1985-01-12 | Omron Tateisi Electronics Co | Receiving circuit in spread spectrum communication system |
| US4530103A (en) * | 1983-08-22 | 1985-07-16 | E-Systems, Inc. | Method and apparatus for baseband tracking of a PN code sequence in a spread spectrum receiver |
| US4644523A (en) * | 1984-03-23 | 1987-02-17 | Sangamo Weston, Inc. | System for improving signal-to-noise ratio in a direct sequence spread spectrum signal receiver |
| US4567588A (en) * | 1984-03-23 | 1986-01-28 | Sangamo Weston, Inc. | Synchronization system for use in direct sequence spread spectrum signal receiver |
| US4561089A (en) * | 1984-03-23 | 1985-12-24 | Sangamo Weston, Inc. | Correlation detectors for use in direct sequence spread spectrum signal receiver |
| JPS6193746A (en) * | 1984-10-12 | 1986-05-12 | Sony Corp | Spread spectrum communication demodulator |
| FR2589021B1 (en) * | 1985-10-21 | 1996-03-29 | Ricoh Kk | INTEGRATED PLAYER-RECORDER |
| GB8621875D0 (en) * | 1986-09-11 | 1986-11-05 | Emi Plc Thorn | Signal receiver |
-
1988
- 1988-12-29 CA CA000587279A patent/CA1318368C/en not_active Expired - Fee Related
-
1989
- 1989-01-06 US US07/294,773 patent/US4965759A/en not_active Expired - Fee Related
- 1989-01-10 GB GB8900532A patent/GB2214034B/en not_active Expired - Lifetime
- 1989-01-13 DE DE3900921A patent/DE3900921C2/en not_active Expired - Fee Related
- 1989-01-13 FR FR898900392A patent/FR2626120B1/en not_active Expired - Lifetime
- 1989-01-13 NL NL8900080A patent/NL8900080A/en not_active Application Discontinuation
Also Published As
| Publication number | Publication date |
|---|---|
| GB2214034A (en) | 1989-08-23 |
| FR2626120A1 (en) | 1989-07-21 |
| GB8900532D0 (en) | 1989-03-08 |
| GB2214034B (en) | 1992-04-15 |
| FR2626120B1 (en) | 1992-07-03 |
| DE3900921A1 (en) | 1989-07-27 |
| NL8900080A (en) | 1989-08-01 |
| US4965759A (en) | 1990-10-23 |
| DE3900921C2 (en) | 1995-04-20 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MKLA | Lapsed | ||
| MKLA | Lapsed |
Effective date: 19951127 |