US7873128B2 - Method and system for equalization in a communications system - Google Patents

Method and system for equalization in a communications system Download PDF

Info

Publication number
US7873128B2
US7873128B2 US10/773,610 US77361004A US7873128B2 US 7873128 B2 US7873128 B2 US 7873128B2 US 77361004 A US77361004 A US 77361004A US 7873128 B2 US7873128 B2 US 7873128B2
Authority
US
United States
Prior art keywords
error correction
code word
filter
decision
correction code
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related, expires
Application number
US10/773,610
Other versions
US20040224651A1 (en
Inventor
Akira Yamanaka
Anand Shah
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Avago Technologies International Sales Pte Ltd
Original Assignee
Broadcom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Broadcom Corp filed Critical Broadcom Corp
Priority to US10/773,610 priority Critical patent/US7873128B2/en
Assigned to ATHENA SEMICONDUCTORS, INC. reassignment ATHENA SEMICONDUCTORS, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: SHAH, ANAND, YAMANAKA, AKIRA
Publication of US20040224651A1 publication Critical patent/US20040224651A1/en
Assigned to BROADCOM CORPORATION reassignment BROADCOM CORPORATION MERGER (SEE DOCUMENT FOR DETAILS). Assignors: ATHENA SEMICONDUCTORS, INC.
Publication of US7873128B2 publication Critical patent/US7873128B2/en
Application granted granted Critical
Assigned to BROADCOM CORPORATION reassignment BROADCOM CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: ATHENA SEMICONDUCTORS, INC.
Assigned to BANK OF AMERICA, N.A., AS COLLATERAL AGENT reassignment BANK OF AMERICA, N.A., AS COLLATERAL AGENT PATENT SECURITY AGREEMENT Assignors: BROADCOM CORPORATION
Assigned to AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD. reassignment AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: BROADCOM CORPORATION
Assigned to BROADCOM CORPORATION reassignment BROADCOM CORPORATION TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Assignors: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Expired - Fee Related legal-status Critical Current
Adjusted expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0057Block codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3944Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes for block codes, especially trellis or lattice decoding thereof
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63Joint error correction and other techniques
    • H03M13/6331Error control coding in combination with equalisation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006Arrangements for removing intersymbol interference
    • H04L25/03012Arrangements for removing intersymbol interference operating in the time domain
    • H04L25/03019Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception
    • H04L25/03057Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception with a recursive structure
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006Arrangements for removing intersymbol interference
    • H04L2025/03433Arrangements for removing intersymbol interference characterised by equaliser structure
    • H04L2025/03439Fixed structures
    • H04L2025/03445Time domain
    • H04L2025/03471Tapped delay lines
    • H04L2025/03484Tapped delay lines time-recursive
    • H04L2025/0349Tapped delay lines time-recursive as a feedback filter

Definitions

  • the present invention relates to modulation systems, and more particularly to a decision feedback equalization system with block code based error correction in a modulation system.
  • wireless local area networks Prominent in the field of home and business, wireless computer networks include the wireless standards known as 802.11.
  • the first standard to be available in commercial products was 802.11b. It supports data rates from 1 Mb/s to 11 Mb/s. To ensure data integrity at such data rates, the communication encompasses many considerations, including equalization of distortion.
  • DFE Decision feedback equalizations
  • One of the ways to resolve such a problem is to use a raw symbol for a decision before the post cursor cancellation by the feedback equalization filtering and after the feed forward equalization filtering. But in this technique the raw symbol used to make a decision has post cursor interference, and the probability of decision error is higher. Once the decision error happens, equalization for the next symbol will not be as reliable as a correct decision case. Because of this, the raw symbol based decision schemes suffer severe performance degradation, especially when the coding gain is larger.
  • aspects for equalization in a communications system include utilizing a block code based error correction scheme in a modulation system of the communication system, and removing cursor inter-symbol interference within an error code correction word to make code word decision with minimum error power-based criteria in the block code based error correction scheme.
  • a decision feedback equalization filter which only removes symbol interferences from the previous error correction code words.
  • a matrix multiplication-based filtering disortion filtering
  • scalar terms for each error correction code word are added to a decision metric of the real part of the projection of the above filtered symbols to the error correction code words.
  • FIG. 1 is a block diagram illustrating an overall system diagram for the present invention
  • FIG. 2 is a block diagram illustrating a decision feedback equalization filter operation for the present invention.
  • FIG. 3 is a graph illustrating performance improvement with the present invention.
  • the present invention relates to decision feedback equalization system with block code based error correction in a modulation system.
  • the following description is presented to enable one of ordinary skill in the art to make and use the invention and is provided in the context of a patent application and its requirements.
  • Various modifications to the preferred embodiment and the generic principles and features described herein will be readily apparent to those skilled in the art.
  • the present invention is not intended to be limited to the embodiments shown but is to be accorded the widest scope consistent with the principles and features described herein.
  • FIG. 1 illustrates an overall system diagram with an example embodiment for 802.11b CCK modulation systems. It should be appreciated that the ideas of the invention are applicable for any general block coding error correction schemes by replacing the Fast Walsh Transform shown with a regular projection to error correction words.
  • the system includes a decision feedback (DF) equalizer 10 after a feed forward equalizer (FFEQ) 12 , the FFEQ 12 receiving data at 22 MHz, and after a feedback filter (FBF) 14 subtraction by subtraction logic 16 .
  • DF decision feedback
  • FFEQ feed forward equalizer
  • BPF feedback filter
  • Modified CCK selector 18 is coupled to the output of the DF 10 and includes an ‘iciWeight’ based code word estimation, as described further hereinbelow.
  • a tap calculator 20 is coupled to receive data from an error calculator (Err calc) 22 , the error calculator 22 coupled to the output of the subtraction logic 16 and to an output of the modified CCK selector 18 .
  • the tap calculator 20 is also coupled to receive data from a loop filter 24 and an output tap data to FBF 14 , the FBF 14 also coupled to modified CCK selector 18 .
  • the modified CCK selector 18 is further coupled to phase logic 26 which sends phase data to the loop filter 24 , the loop filter 24 coupled to Phase Accumulator 28 .
  • Phase Accumulator 28 also receives offset frequency (FrOffset) data and passes data to the FFEQ 12 .
  • the system outputs code bits from the modified CCK selector 18 through decision (Dec) logic 30 .
  • FIG. 2 illustrates more particularly a block diagram of the operation of the DF 10 in the system of the present invention.
  • the example implementation in FIG. 2 illustrates a feedback equalizer using LMS (least mean square??) tap update including distortion filtering and a Walsh code selector, where to cancel the interference from the previous error correction code words, the delay tapped line has a mechanism to feed the last decoded Walsh code when it becomes available. Otherwise zero is fed.
  • LMS least mean square??
  • wij is the i-th element of j-th Walsh codes.
  • the symbol ‘*’ represents Hermetian (conjugate transpose) operation.
  • the plot of FIG. 3 shows the performance improvement with the DF equalization of the present invention (indicated by the solid plot line) compared to raw data slicing-based DFE (indicated by the dashed plot line) for 11 Mbps CCK. As shown, an improvement of about 5 db is seen in the signal to noise ratio (SNR) for the bit error rate (BER).
  • SNR signal to noise ratio
  • a code word decision is made with minimum error power based criteria by removing the post cursor inter symbol interference within the error correction code words.
  • This is achieved by: (1) having a decision feedback equalization filter, which only removes symbol interferences from the previous error correction code words; (2) inserting a matrix multiplication-based filtering (distortion filtering) after a feed forward equalizer filtering and after the feedback filtering for symbol interference from the symbols in the previous error correction code words; and (3) having scalar terms for each error correction code word added to a decision metric of the real part of the projection of the above-filtered symbols to the error correction code words.
  • the distortion filter handles the removal of all the post cursor interference up to the length of the error correction word. In this case, there is no need to have feed back equalization filter taps for the length of the error correction word.
  • the matrix for the distortion filtering would not be square any more, as shown in the following:
  • iciWeight i [ ⁇ t i ( a 0 ) ⁇ t i ( a 1 ) ⁇ t i ( a 2 ) ⁇ t i ( a 3 ) ⁇ t i ( a 4 ) ⁇ t i ( a 5 ) ⁇ t i ( a 6 ) ⁇ t i ( a 7 )] ⁇ w i

Abstract

Aspects for equalization in a communications system are described. The aspects include utilizing a block code based error correction scheme in a modulation system of the communication system, and removing cursor inter-symbol interference within an error correction code word to make code word decision with minimum error power-based criteria in the block code based error correction scheme.

Description

CROSS REFERENCE TO RELATED APPLICATIONS
The present application claims the benefit of U.S. Provisional Patent Application No. 60/445,713, filed Feb. 7, 2003, entitled “Decision feedback equalization system with block code based error correction,” which is incorporated herein by reference in its entirety.
FIELD OF THE INVENTION
The present invention relates to modulation systems, and more particularly to a decision feedback equalization system with block code based error correction in a modulation system.
BACKGROUND OF THE INVENTION
One increasingly popular application for wireless systems are wireless local area networks (WLANs) of computer systems. Prominent in the field of home and business, wireless computer networks include the wireless standards known as 802.11. The first standard to be available in commercial products was 802.11b. It supports data rates from 1 Mb/s to 11 Mb/s. To ensure data integrity at such data rates, the communication encompasses many considerations, including equalization of distortion.
Decision feedback equalizations (DFE) are known to be powerful methods to equalize a distortion caused by multi-path channels, and still have rather small implementation complexities. However, if the communication system utilizes error correction codes, a DFE is not possible to implement due to a delay required for decoding of the error correction code, which makes the decision for the feedback no longer available for the equalization of a next symbol.
One of the ways to resolve such a problem is to use a raw symbol for a decision before the post cursor cancellation by the feedback equalization filtering and after the feed forward equalization filtering. But in this technique the raw symbol used to make a decision has post cursor interference, and the probability of decision error is higher. Once the decision error happens, equalization for the next symbol will not be as reliable as a correct decision case. Because of this, the raw symbol based decision schemes suffer severe performance degradation, especially when the coding gain is larger.
Accordingly, a need exists for an optimal equalization algorithm for a communication system with block code based error correction that resolves the delay of decision availability. The present invention addresses such a need.
SUMMARY OF INVENTION
Aspects for equalization in a communications system are described. The aspects include utilizing a block code based error correction scheme in a modulation system of the communication system, and removing cursor inter-symbol interference within an error code correction word to make code word decision with minimum error power-based criteria in the block code based error correction scheme.
These aspects are achieved by having a decision feedback equalization filter, which only removes symbol interferences from the previous error correction code words. Further a matrix multiplication-based filtering (distortion filtering) is inserted after a feed forward equalizer filtering and the feedback filtering for symbol interference from the symbols in the previous error correction code words. And, scalar terms for each error correction code word are added to a decision metric of the real part of the projection of the above filtered symbols to the error correction code words.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram illustrating an overall system diagram for the present invention;
FIG. 2 is a block diagram illustrating a decision feedback equalization filter operation for the present invention; and
FIG. 3 is a graph illustrating performance improvement with the present invention.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
The present invention relates to decision feedback equalization system with block code based error correction in a modulation system. The following description is presented to enable one of ordinary skill in the art to make and use the invention and is provided in the context of a patent application and its requirements. Various modifications to the preferred embodiment and the generic principles and features described herein will be readily apparent to those skilled in the art. Thus, the present invention is not intended to be limited to the embodiments shown but is to be accorded the widest scope consistent with the principles and features described herein.
Embodiments and examples of the present invention are described below. While particular applications and methods are explained, it should be understood that the present invention can be used in a wide variety of other applications and with other techniques within the scope of the present invention.
FIG. 1 illustrates an overall system diagram with an example embodiment for 802.11b CCK modulation systems. It should be appreciated that the ideas of the invention are applicable for any general block coding error correction schemes by replacing the Fast Walsh Transform shown with a regular projection to error correction words.
Referring now to FIG. 1, the system includes a decision feedback (DF) equalizer 10 after a feed forward equalizer (FFEQ) 12, the FFEQ 12 receiving data at 22 MHz, and after a feedback filter (FBF) 14 subtraction by subtraction logic 16. Modified CCK selector 18 is coupled to the output of the DF 10 and includes an ‘iciWeight’ based code word estimation, as described further hereinbelow. A tap calculator 20 is coupled to receive data from an error calculator (Err calc) 22, the error calculator 22 coupled to the output of the subtraction logic 16 and to an output of the modified CCK selector 18. The tap calculator 20 is also coupled to receive data from a loop filter 24 and an output tap data to FBF 14, the FBF 14 also coupled to modified CCK selector 18. The modified CCK selector 18 is further coupled to phase logic 26 which sends phase data to the loop filter 24, the loop filter 24 coupled to Phase Accumulator 28. Phase Accumulator 28 also receives offset frequency (FrOffset) data and passes data to the FFEQ 12. The system outputs code bits from the modified CCK selector 18 through decision (Dec) logic 30.
FIG. 2 illustrates more particularly a block diagram of the operation of the DF 10 in the system of the present invention. In general, the example implementation in FIG. 2 illustrates a feedback equalizer using LMS (least mean square??) tap update including distortion filtering and a Walsh code selector, where to cancel the interference from the previous error correction code words, the delay tapped line has a mechanism to feed the last decoded Walsh code when it becomes available. Otherwise zero is fed. For the tap update calculation, delayed decisions are fed.
For the distortion filtering by distortion filter 32, the operation is defined as
out=R·in
where in and out are the input and output symbol vectors of length 8 and R is defined as:
R = [ 1 0 0 0 0 0 0 0 c 1 1 0 0 0 0 0 0 c 2 c 1 1 0 0 0 0 0 c 3 c 2 c 1 1 0 0 0 0 c 4 c 3 c 2 c 1 1 0 0 0 c 5 c 4 c 3 c 2 c 1 1 0 0 c 6 c 5 c 4 c 3 c 2 c 1 1 0 · · · · · · · , ]
where ci is the optimal DFE coefficients for the i-th post cursor interference rejection.
For the fast walsh transform (FWT) 34 operation,
out i = i = 0 7 w * i j · i n i
Where, in and out are the input and output symbol vectors of length 8 and wij is the i-th element of j-th Walsh codes.
From the Walsh code selector 36, the index of the most likely error correction code word is returned as follows:
Codeno=maxidx(iciWeight−2·maxabs)
Here, maxidx( ) returns the index of the maximum element of the input vector and maxabs is a vector calculated as:
maxabsi=max(abs(real(corri)), abs(imag(corr1)))
The ‘iciWeight’ vector calculation for the code word dependent scalar terms are defined as:
iciWeighti =w i *·R*·*R·w i
where wi is the i-th error correction code word. The symbol ‘*’ represents Hermetian (conjugate transpose) operation.
The plot of FIG. 3 shows the performance improvement with the DF equalization of the present invention (indicated by the solid plot line) compared to raw data slicing-based DFE (indicated by the dashed plot line) for 11 Mbps CCK. As shown, an improvement of about 5 db is seen in the signal to noise ratio (SNR) for the bit error rate (BER).
Thus, through the present invention, a code word decision is made with minimum error power based criteria by removing the post cursor inter symbol interference within the error correction code words. This is achieved by: (1) having a decision feedback equalization filter, which only removes symbol interferences from the previous error correction code words; (2) inserting a matrix multiplication-based filtering (distortion filtering) after a feed forward equalizer filtering and after the feedback filtering for symbol interference from the symbols in the previous error correction code words; and (3) having scalar terms for each error correction code word added to a decision metric of the real part of the projection of the above-filtered symbols to the error correction code words.
Although the present invention has been described in accordance with the embodiments shown, one of ordinary skill in the art will readily recognize that there could be variations to the embodiments and those variations would be within the spirit and scope of the present invention. For example, in one variation of the invention, the distortion filter handles the removal of all the post cursor interference up to the length of the error correction word. In this case, there is no need to have feed back equalization filter taps for the length of the error correction word. The matrix for the distortion filtering would not be square any more, as shown in the following:
R = [ c 7 c 6 c 5 c 4 c 3 c 2 c 1 1 0 0 0 0 0 0 0 0 c 7 c 6 c 5 c 4 c 3 c 2 c 1 1 0 0 0 0 0 0 0 0 c 7 c 6 c 5 c 4 c 3 c 2 c 1 1 0 0 0 0 0 0 0 0 c 7 c 6 c 5 c 4 c 3 c 2 c 1 1 0 0 0 0 0 0 0 0 c 7 c 6 c 5 c 4 c 3 c 2 c 1 1 0 0 0 0 0 0 0 0 c 7 c 6 c 5 c 4 c 3 c 2 c 1 1 0 0 0 0 0 0 0 0 c 7 c 6 c 5 c 4 c 3 c 2 c 1 1 0 0 0 0 0 0 0 0 c 7 c 6 c 5 c 4 c 3 c 2 c 1 1 ]
As an additional implementation option, the following is available: A simplified way of implementation for a certain class of error correction codes, where an efficient fast transform is available to calculate the projections of symbols to error correction code words. The ‘iciWeight’ calculation can be performed flowingly using a fast transform:
proji =w i *·R*=[ƒt i(c 0*)ƒt i(c 1*)ƒt i(c 2*)ƒt i(c 3*)ƒt i(c 4*)ƒt i(c 5*)ƒt i(c 6*)ƒt i(c 7*)]iciWeighti=proji·proji*
where, ci is a column vector, which is defined as:
And a function ‘ƒti( )’ is the i-th outputs of the fast transform.
Another further simplified way of ‘iciWeight’ calculation:
First, the following matrix and vectors are defined:
A=R*·R=[a 0 a 2 a 3 a 4 a 5 a 6 a 7]
Then, the ‘iciWeight’ can be calculated using a fast transform as:
iciWeighti =[ƒt i(a 0t i(a 1t i(a 2t i(a 3t i(a 4t i(a 5t i(a 6t i(a 7)]·w i
Accordingly, many modifications may be made by one of ordinary skill in the art without departing from the spirit and scope of the appended claims.

Claims (17)

1. A method for equalization in a communications system, the method comprising:
removing post cursor inter-symbol interference (ISI) within at least one error correction code word in a block code based error correction scheme,
wherein said block code based error correction scheme utilizes a feed forward equalizer filter for filtering at least a feedback signal comprising information from said at least one error correction code word, and wherein said feedback signal comprises phase data.
2. The method of claim 1, wherein said removing of said post cursor inter-symbol interference comprises removing symbol interferences from at least one previous error correction code word utilizing a decision feedback equalization filter.
3. The method of claim 2, wherein said removing of said post cursor inter-symbol interference comprises utilizing distortion filtering in said decision feedback equalization filter, for generating filtered symbols.
4. The method of claim 3, wherein said utilizing of said distortion filtering comprises inserting a matrix multiplication-based filter after a feed forward equalizer filter and a feedback filter in the communication system, for symbol interference from symbols in said at least one previous error correction code word.
5. The method of claim 3, wherein said removing of said post cursor inter-symbol interference comprises adding scalar terms for each of said at least one error correction code word to a decision metric of a real part of a projection of said filtered symbols to said at least one error correction code word.
6. The method of claim 1, wherein said block code based error correction scheme is utilized in a modulation system of the communication system.
7. The method of claim 1, comprising:
selecting a code word for said block code based error correction scheme, based on said removing of said post cursor inter-symbol interference within said at least one error correction code word.
8. A system for equalization in a communications system, the system comprising:
a modulation system utilizing a block code based error correction scheme; and
a feedback equalization filter provided within said modulation system for removing post cursor inter-symbol interference (ISI) within at least one error correction code word to make at least one code word decision in said block code based error correction scheme, wherein said block code based error correction scheme utilizes a feed forward equalizer filter for filtering at least a feedback signal comprising information from said at least one error correction code word, and wherein said feedback signal comprises phase data.
9. The system of claim 8, wherein said feedback equalization filter removes symbol interferences from at least one previous error correction code word.
10. The system of claim 9, wherein said feedback equalization filter comprises a distortion filter that generates filtered symbols.
11. The system of claim 10, wherein said distortion filter comprises a matrix multiplication-based filter inserted after a feed forward equalizer filter and a feedback filter for symbol interference from symbols in said at least one previous error correction code word.
12. The system of claim 10, comprising a decision metric for said feedback equalization filter, wherein scalar terms are added for each of said at least one error correction code word to a decision metric of a real part of a projection of said filtered symbols to said at least one error correction code word.
13. A method for equalization in a communications system, the method comprising:
performing block code based error correction during signal modulation in the communications system; and
making at least one code word decision with minimum error power-based criteria during said block code based error correction with a decision feedback equalization filter that removes post cursor inter-symbol interference (ISI) within at least one error correction code word, wherein said block code based error correction utilizes a feed forward equalizer filter for filtering at least a feedback signal comprising information from said at least one error correction code word, and wherein said feedback signal comprises phase data.
14. The method of claim 13, wherein said making of said at least one code word decision comprises utilizing said decision feedback equalization filter to remove symbol interference from at least one previous error correction code word.
15. The method of claim 14, wherein said making of said at least one code word decision comprises utilizing a distortion filter in said decision feedback equalization filter, for generating filtered symbols.
16. The method of claim 15, comprising inserting a matrix multiplication-based filter after a feed forward equalizer filter and a feedback filter for symbol interference from symbols in said at least one previous error correction code word for said distortion filter.
17. The method of claim 15, comprising utilizing a decision metric for said decision feedback equalization filter, wherein scalar terms are added for each error correction code word to a decision metric of a real part of a projection of said filtered symbols to said at least one error correction code word.
US10/773,610 2003-02-07 2004-02-06 Method and system for equalization in a communications system Expired - Fee Related US7873128B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US10/773,610 US7873128B2 (en) 2003-02-07 2004-02-06 Method and system for equalization in a communications system

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US44571303P 2003-02-07 2003-02-07
US10/773,610 US7873128B2 (en) 2003-02-07 2004-02-06 Method and system for equalization in a communications system

Publications (2)

Publication Number Publication Date
US20040224651A1 US20040224651A1 (en) 2004-11-11
US7873128B2 true US7873128B2 (en) 2011-01-18

Family

ID=33423080

Family Applications (1)

Application Number Title Priority Date Filing Date
US10/773,610 Expired - Fee Related US7873128B2 (en) 2003-02-07 2004-02-06 Method and system for equalization in a communications system

Country Status (1)

Country Link
US (1) US7873128B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019105244A1 (en) * 2017-12-01 2019-06-06 华为技术有限公司 Error correction method and error correction apparatus

Citations (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5052000A (en) * 1989-06-09 1991-09-24 At&T Bell Laboratories Technique for improving the operation of decision feedback equalizers in communications systems utilizing error correction
US5546430A (en) * 1995-05-01 1996-08-13 Universite du Quebeca Hull Detector for demodulating a received signal and producing an information data signal with reduced intersymbol interference
US6012161A (en) * 1997-11-26 2000-01-04 At&T Corp. System and method for joint coding and decision feedback equalization
US6067655A (en) * 1997-08-28 2000-05-23 Stmicroelectronics, N.V. Burst error limiting symbol detector system
US6088390A (en) * 1997-07-22 2000-07-11 Analog Devices, Inc. Integrating decision feedback equalization and forward error correction to improve performance in point-to-multipoint digital transmission
US6167082A (en) * 1997-03-06 2000-12-26 Level One Communications, Inc. Adaptive equalizers and methods for carrying out equalization with a precoded transmitter
US20010009565A1 (en) * 2000-01-20 2001-07-26 Telefonaktiebolaget Lm Ericsson (Pupl) Method of detecting a sequence of information symbols, and a mobile station adapted to performing the method
US20010036223A1 (en) * 1999-06-29 2001-11-01 Webster Mark A. Rake receiver with embedded decision feedback equalizer
US20020116667A1 (en) * 2001-02-16 2002-08-22 Mcewen Peter Adjusting a clock signal
US20030123586A1 (en) * 2001-12-28 2003-07-03 Kuang-Yu Yen Receiver for block code in near-minimum phase channel
US20030161421A1 (en) * 2002-02-27 2003-08-28 Michael Schmidt Interference reduction in CCK modulated signals
US20030223489A1 (en) * 2002-06-04 2003-12-04 John Smee Receiver with a decision feedback equalizer and a linear equalizer
US6690739B1 (en) * 2000-01-14 2004-02-10 Shou Yee Mui Method for intersymbol interference compensation
US20040032905A1 (en) * 2002-08-19 2004-02-19 Andreas Dittrich Receiver for high rate digital communication system
US20040091023A1 (en) * 2002-11-07 2004-05-13 Winbond Electronics Corp Packet-based multiplication-free CCK demodulator with a fast multipath interference cipher
US20040101068A1 (en) * 2002-11-25 2004-05-27 Tzu-Pai Wang Digital receiver capable of processing modulated signals at various data rates
US20040125884A1 (en) * 2002-12-26 2004-07-01 Lee-Fang Wei Method and apparatus for decoding orthogonal codes
US20040131109A1 (en) * 2002-10-25 2004-07-08 Gct Semiconductor, Inc. Bidirectional turbo ISI canceller-based DSSS receiver for high-speed wireless LAN
US6850493B1 (en) * 1998-03-09 2005-02-01 Broadcom Corporation Off-line broadband network interface
US20050201456A1 (en) * 2001-12-06 2005-09-15 Ismail Lakkis Systems and methods for equalization of received signals in a wireless communication network
US20050226341A1 (en) * 2002-10-01 2005-10-13 Qinfang Sun Decision feedback channel estimation and pilot tracking for OFDM systems
US7050517B1 (en) * 2000-04-28 2006-05-23 National Semiconductor Corporation System and method suitable for receiving gigabit ethernet signals
US7187730B1 (en) * 2001-03-21 2007-03-06 Marvell International Ltd. Method and apparatus for predicting CCK subsymbols
US7212569B1 (en) * 2002-06-28 2007-05-01 At&T Corp. Frequency domain decision feedback equalizer
US7746925B1 (en) * 2001-11-29 2010-06-29 Marvell International Ltd. Decoding method and apparatus

Patent Citations (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5052000A (en) * 1989-06-09 1991-09-24 At&T Bell Laboratories Technique for improving the operation of decision feedback equalizers in communications systems utilizing error correction
US5546430A (en) * 1995-05-01 1996-08-13 Universite du Quebeca Hull Detector for demodulating a received signal and producing an information data signal with reduced intersymbol interference
US6167082A (en) * 1997-03-06 2000-12-26 Level One Communications, Inc. Adaptive equalizers and methods for carrying out equalization with a precoded transmitter
US6088390A (en) * 1997-07-22 2000-07-11 Analog Devices, Inc. Integrating decision feedback equalization and forward error correction to improve performance in point-to-multipoint digital transmission
US6067655A (en) * 1997-08-28 2000-05-23 Stmicroelectronics, N.V. Burst error limiting symbol detector system
US6012161A (en) * 1997-11-26 2000-01-04 At&T Corp. System and method for joint coding and decision feedback equalization
US6850493B1 (en) * 1998-03-09 2005-02-01 Broadcom Corporation Off-line broadband network interface
US20010036223A1 (en) * 1999-06-29 2001-11-01 Webster Mark A. Rake receiver with embedded decision feedback equalizer
US6690739B1 (en) * 2000-01-14 2004-02-10 Shou Yee Mui Method for intersymbol interference compensation
US6898239B2 (en) * 2000-01-20 2005-05-24 Telefonaktiebolaget Lm Ericsson (Publ) Method of detecting a sequence of information symbols, and a mobile station adapted to performing the method
US20010009565A1 (en) * 2000-01-20 2001-07-26 Telefonaktiebolaget Lm Ericsson (Pupl) Method of detecting a sequence of information symbols, and a mobile station adapted to performing the method
US7050517B1 (en) * 2000-04-28 2006-05-23 National Semiconductor Corporation System and method suitable for receiving gigabit ethernet signals
US20020116667A1 (en) * 2001-02-16 2002-08-22 Mcewen Peter Adjusting a clock signal
US7187730B1 (en) * 2001-03-21 2007-03-06 Marvell International Ltd. Method and apparatus for predicting CCK subsymbols
US7746925B1 (en) * 2001-11-29 2010-06-29 Marvell International Ltd. Decoding method and apparatus
US20050201456A1 (en) * 2001-12-06 2005-09-15 Ismail Lakkis Systems and methods for equalization of received signals in a wireless communication network
US20030123586A1 (en) * 2001-12-28 2003-07-03 Kuang-Yu Yen Receiver for block code in near-minimum phase channel
US7130343B2 (en) * 2002-02-27 2006-10-31 Advanced Micro Devices, Inc. Interference reduction in CCK modulated signals
US20030161421A1 (en) * 2002-02-27 2003-08-28 Michael Schmidt Interference reduction in CCK modulated signals
US20030223489A1 (en) * 2002-06-04 2003-12-04 John Smee Receiver with a decision feedback equalizer and a linear equalizer
US7212569B1 (en) * 2002-06-28 2007-05-01 At&T Corp. Frequency domain decision feedback equalizer
US20040032905A1 (en) * 2002-08-19 2004-02-19 Andreas Dittrich Receiver for high rate digital communication system
US20050226341A1 (en) * 2002-10-01 2005-10-13 Qinfang Sun Decision feedback channel estimation and pilot tracking for OFDM systems
US20040131109A1 (en) * 2002-10-25 2004-07-08 Gct Semiconductor, Inc. Bidirectional turbo ISI canceller-based DSSS receiver for high-speed wireless LAN
US20040091023A1 (en) * 2002-11-07 2004-05-13 Winbond Electronics Corp Packet-based multiplication-free CCK demodulator with a fast multipath interference cipher
US20040101068A1 (en) * 2002-11-25 2004-05-27 Tzu-Pai Wang Digital receiver capable of processing modulated signals at various data rates
US20040125884A1 (en) * 2002-12-26 2004-07-01 Lee-Fang Wei Method and apparatus for decoding orthogonal codes

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019105244A1 (en) * 2017-12-01 2019-06-06 华为技术有限公司 Error correction method and error correction apparatus
US11218246B2 (en) 2017-12-01 2022-01-04 Huawei Technologies Co., Ltd. Error correction method and error correction apparatus

Also Published As

Publication number Publication date
US20040224651A1 (en) 2004-11-11

Similar Documents

Publication Publication Date Title
JP5290251B2 (en) Decision feedback equalizer combining CCK encoding and decoding in feedback filtering
JP4741254B2 (en) Decision feedback equalizer and feedback filter coefficient update method
US7903728B2 (en) Equalize training method using re-encoded bits and known training sequences
EP1365554B1 (en) Computation of coefficients for a decision feedback equaliser with variable delay
US7826575B2 (en) Selectively disabling interference cancellation based on channel dispersion estimation
US20060200511A1 (en) Channel equalizer and method of equalizing a channel
US20050084045A1 (en) Multi-pass interference reduction in a GSM communication system
US20080075179A1 (en) Power collection based adaptive length equalizer
EP1556959A2 (en) Bidirectional turbo isi canceller-based dsss receiver for high-speed wireless lan
JP2006229944A (en) Communication system, method and device
US20030123585A1 (en) Receiver with DFE and viterbi algorithm for block code transmission
US8085840B2 (en) Method and apparatus for reducing interference of a signal over a plurality of stages
US20050053129A1 (en) Sparse channel dual-error tracking adaptive filter/equalizer
EP1479207B1 (en) Method and system for joint decision feedback equalization and decoding
US7873128B2 (en) Method and system for equalization in a communications system
WO2006127119A2 (en) Method and apparatus for equalization control
US6587501B2 (en) Method and apparatus for joint detection of a coded signal in a CDMA system
Palicot et al. Performance analysis of the weighted decision feedback equalizer
US7289559B2 (en) Method for updating coefficients in decision feedback equalizer
US7450635B2 (en) Single antenna interference cancellation within a wireless terminal
KR101687493B1 (en) Method and Device for transmitting signal in FTN system
US20090285125A1 (en) Iterative synchronous and Asynchronous Multi-User Detection with Optimum Soft limiter
Colonnese et al. Semiblind bussgang equalization for sparse channels
US20080013648A1 (en) Decoding system and method for deciding a compensated signal
Tomasin et al. Performance comparison of frequency domain equalizers for the IEEE 802.16 a WMAN standard

Legal Events

Date Code Title Description
AS Assignment

Owner name: ATHENA SEMICONDUCTORS, INC., CALIFORNIA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:YAMANAKA, AKIRA;SHAH, ANAND;REEL/FRAME:014813/0774

Effective date: 20040621

AS Assignment

Owner name: BROADCOM CORPORATION,CALIFORNIA

Free format text: MERGER;ASSIGNOR:ATHENA SEMICONDUCTORS, INC.;REEL/FRAME:018075/0976

Effective date: 20060522

Owner name: BROADCOM CORPORATION, CALIFORNIA

Free format text: MERGER;ASSIGNOR:ATHENA SEMICONDUCTORS, INC.;REEL/FRAME:018075/0976

Effective date: 20060522

AS Assignment

Owner name: BROADCOM CORPORATION, CALIFORNIA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:ATHENA SEMICONDUCTORS, INC.;REEL/FRAME:028398/0377

Effective date: 20060522

REMI Maintenance fee reminder mailed
LAPS Lapse for failure to pay maintenance fees
STCH Information on status: patent discontinuation

Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362

FP Lapsed due to failure to pay maintenance fee

Effective date: 20150118

AS Assignment

Owner name: BANK OF AMERICA, N.A., AS COLLATERAL AGENT, NORTH CAROLINA

Free format text: PATENT SECURITY AGREEMENT;ASSIGNOR:BROADCOM CORPORATION;REEL/FRAME:037806/0001

Effective date: 20160201

Owner name: BANK OF AMERICA, N.A., AS COLLATERAL AGENT, NORTH

Free format text: PATENT SECURITY AGREEMENT;ASSIGNOR:BROADCOM CORPORATION;REEL/FRAME:037806/0001

Effective date: 20160201

AS Assignment

Owner name: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD., SINGAPORE

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:BROADCOM CORPORATION;REEL/FRAME:041706/0001

Effective date: 20170120

Owner name: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:BROADCOM CORPORATION;REEL/FRAME:041706/0001

Effective date: 20170120

AS Assignment

Owner name: BROADCOM CORPORATION, CALIFORNIA

Free format text: TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS;ASSIGNOR:BANK OF AMERICA, N.A., AS COLLATERAL AGENT;REEL/FRAME:041712/0001

Effective date: 20170119