WO2000034846A3 - Method, system, and computer program product for error detection and correction in a synchronization word - Google Patents
Method, system, and computer program product for error detection and correction in a synchronization word Download PDFInfo
- Publication number
- WO2000034846A3 WO2000034846A3 PCT/US1999/029445 US9929445W WO0034846A3 WO 2000034846 A3 WO2000034846 A3 WO 2000034846A3 US 9929445 W US9929445 W US 9929445W WO 0034846 A3 WO0034846 A3 WO 0034846A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- synch word
- synch
- word
- hamming distance
- value
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
- H04L1/0054—Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
- H04L7/042—Detectors therefor, e.g. correlators, state machines
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/438—Interfacing the downstream path of the transmission network originating from a server, e.g. retrieving MPEG packets from an IP network
- H04N21/4382—Demodulation or channel decoding, e.g. QPSK demodulation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
Abstract
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU23585/00A AU2358500A (en) | 1998-12-11 | 1999-12-13 | Method, system, and computer program product for error detection and correction in a synchronization word |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US20929298A | 1998-12-11 | 1998-12-11 | |
US09/209,292 | 1998-12-11 |
Publications (3)
Publication Number | Publication Date |
---|---|
WO2000034846A2 WO2000034846A2 (en) | 2000-06-15 |
WO2000034846A3 true WO2000034846A3 (en) | 2000-11-23 |
WO2000034846A9 WO2000034846A9 (en) | 2001-05-10 |
Family
ID=22778186
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US1999/029445 WO2000034846A2 (en) | 1998-12-11 | 1999-12-13 | Method, system, and computer program product for error detection and correction in a synchronization word |
Country Status (2)
Country | Link |
---|---|
AU (1) | AU2358500A (en) |
WO (1) | WO2000034846A2 (en) |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4646303A (en) * | 1983-10-05 | 1987-02-24 | Nippon Gakki Seizo Kabushiki Kaisha | Data error detection and correction circuit |
US5031218A (en) * | 1988-03-30 | 1991-07-09 | International Business Machines Corporation | Redundant message processing and storage |
US5309450A (en) * | 1990-04-30 | 1994-05-03 | Samsung Electronics Co., Ltd. | Error correction coding method and apparatus for digital image information |
US5856979A (en) * | 1996-04-15 | 1999-01-05 | Robert Bosch Gmbh | Error-robust multiplex process with retransmission |
US5889793A (en) * | 1997-06-27 | 1999-03-30 | Integrated Device Technology, Inc. | Methods and apparatus for error correction |
US5920439A (en) * | 1997-02-21 | 1999-07-06 | Storage Technology Corporation | Method for determining longitudinal position on a magnetic tape having an embedded position count field |
US5987630A (en) * | 1996-11-12 | 1999-11-16 | Fujitsu Limited | Method of descrambling scrambled data using a scramble pattern and scramble pattern generator |
US5999110A (en) * | 1998-02-17 | 1999-12-07 | International Business Machines Corporation | Defect tolerant binary synchronization mark |
-
1999
- 1999-12-13 WO PCT/US1999/029445 patent/WO2000034846A2/en active Application Filing
- 1999-12-13 AU AU23585/00A patent/AU2358500A/en not_active Abandoned
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4646303A (en) * | 1983-10-05 | 1987-02-24 | Nippon Gakki Seizo Kabushiki Kaisha | Data error detection and correction circuit |
US5031218A (en) * | 1988-03-30 | 1991-07-09 | International Business Machines Corporation | Redundant message processing and storage |
US5309450A (en) * | 1990-04-30 | 1994-05-03 | Samsung Electronics Co., Ltd. | Error correction coding method and apparatus for digital image information |
US5856979A (en) * | 1996-04-15 | 1999-01-05 | Robert Bosch Gmbh | Error-robust multiplex process with retransmission |
US5987630A (en) * | 1996-11-12 | 1999-11-16 | Fujitsu Limited | Method of descrambling scrambled data using a scramble pattern and scramble pattern generator |
US5920439A (en) * | 1997-02-21 | 1999-07-06 | Storage Technology Corporation | Method for determining longitudinal position on a magnetic tape having an embedded position count field |
US5889793A (en) * | 1997-06-27 | 1999-03-30 | Integrated Device Technology, Inc. | Methods and apparatus for error correction |
US5999110A (en) * | 1998-02-17 | 1999-12-07 | International Business Machines Corporation | Defect tolerant binary synchronization mark |
Non-Patent Citations (7)
Title |
---|
AL-SUBBAGH M. ET AL.: "Optimum patterns for frame alignment", IEEE, December 1988 (1988-12-01), pages 594 - 603 * |
CASTILLO F. ET AL.: "A neural inspired associative memory", IEEE, 1991, pages 1753 - 1757 * |
CHRISTOPHER L. ET AL.: "A fully integrated digital demodulation and forward error correction IC for digital satellite television", IEEE, February 1995 (1995-02-01), pages 281 - 284 * |
HAMMONS JR.: "CRC-based techniques for combined burst synchronization and error detection in TDMA PCS systems", IEEE, 1996, pages 472 - 476 * |
HESHAMI M. ET AL.: "A 250-MHz skewed-clock pipelined data buffer", IEEE, 1996, pages 376 - 383 * |
MIYAZAWA S. ET AL.: "A BiCMOS PLL-based data separator circuit high stability and accuracy", IEEE, 1991, pages 116 - 121 * |
SOBEY C.: "Probability of error for fault-tolerant byte synchronization detectors", IEEE, June 1996 (1996-06-01), pages 1528 - 1532 * |
Also Published As
Publication number | Publication date |
---|---|
WO2000034846A9 (en) | 2001-05-10 |
WO2000034846A2 (en) | 2000-06-15 |
AU2358500A (en) | 2000-06-26 |
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